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PDF USB2223-03 Data sheet ( Hoja de datos )
| Número de pieza | USB2223-03 | |
| Descripción | Bus Powered USB2.0 Flash Media Controller | |
| Fabricantes | SMSC Corporation | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de USB2223-03 (archivo pdf) en la parte inferior de esta página. Total 20 Páginas | ||
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USB2223-03
Bus Powered USB2.0
Flash Media Controller
Product Features
Complete System Solution for interfacing
SmartMediaTM (SM), Memory StickTM (MS), High
Speed Memory Stick (HSMS), Memory Stick
PROTM (MSPRO), Memory Stick DuoTM
(MSDUO), Secure Digital (SD), Mini-Secure
Digital (Mini-SD), Transflash (SD),
MultiMediaCardTM (MMC), Reduced Size
Multimedia Card (RS-MMC), NAND Flash,
Compact FlashTM (CF), CF UltraTM I&II and CF
form-factor ATA hard drives to USB2.0 bus.
− Supports USB Bulk Only Mass Storage Compliant
Bootable BIOS
Support for simultaneous operation of all above
devices. (only one at a time of each of the
following groups supported: CF or ATA drive, SM
or NAND, SD or MMC)
On-Chip 4-Bit High Speed Memory Stick and MS
PRO Hardware Circuitry
On-Chip firmware reads and writes High Speed
Memory Stick and MS PRO
1-bit ECC correction performed in hardware for
maximum efficiency
USB Bus Power Certified
3.3 Volt I/O with 5V input tolerance
Complete USB Specification 2.0 Compatibility for
Bus Powered Operation
− Includes USB2.0 Transceiver
− A Bi-directional Control and a Bi-directional Bulk
Endpoint are provided.
8051 8 bit microprocessor
− Provides low speed control functions
− 30 Mhz execution speed at 4 cycles per instruction
average
− 12K Bytes of internal SRAM for general purpose
scratchpad
− 768 Bytes of internal SRAM for general purpose
scratchpad or program execution while re-flashing
external ROM
Datasheet
Double Buffered Bulk Endpoint
− Bi-directional 512 Byte Buffer for Bulk Endpoint
− 64 Byte RX Control Endpoint Buffer
− 64 Byte TX Control Endpoint Buffer
Internal or External Program Memory Interface
− 64K Byte Internal Code Space or Optional 64K Byte
External Code Space using Flash, SRAM or EPROM
memory.
On Board 12Mhz Crystal Driver Circuit
On-Chip 1.8V Regulator for Low Power Core
Operation
Internal PLL for 480Mhz USB2.0 Sampling,
Configurable MCU clock
Supports firmware upgrade via USB bus if “boot
block” Flash program memory is used
15 GPIOs for special function use: LED
indicators, button inputs, power control to
memory devices, etc.
− Inputs capable of generating interrupts with either
edge sensitivity
− Attribute bit controlled features:
− Activity LED polarity/operation/blink rate
− Full or Partial Card compliance checking
− Bus or Self Powered
− LUN configuration and assignment
− Write Protect Polarity
− Detach on no Card Inserted for Notebook apps
− Inquiry Command operation
− SD Write Protect operation
− Older CF card support
− Force USB 1.1 reporting
Compatible with Microsoft WinXP, WinME,
Win2K SP3, Apple OS10, Softconnex, and Linux
Multi-LUN Mass Storage Class Drivers
Win2K, Win98/98SE and Apple OS8.6 and OS9
Multi-LUN Mass Storage Class Drivers available
from SMSC
128 Pin TQFP Green, Lead-free Package
(1.0mm height, 14mm x14mm footprint)
SMSC USB2223-03-03
Page 1
DATASHEET
Revision 1.2 (06-13-06)
1 page  
Bus Powered USB2.0 Flash Media Controller
Datasheet
Chapter 2 Acronyms and Definitions
2.1
Acronyms
SM: SmartMedia
SMC: SmartMedia Controller
FM: Flash Media
FMC: Flash Media Controller
CF: Compact Flash
CFC: CompactFlash Controller
SD: Secure Digital
SDC: Secure Digital Controller
MMC: MultiMediaCard
MS: Memory Stick
MSC: Memory Stick Controller
TPC: Transport Protocol Code.
ECC: Error Checking and Correcting
CRC: Cyclic Redundancy Checking
2.2
Definitions
Flash Media DMA UNIT (FMDU): The control logic in the flash media controller block as shown in the
Block Diagram that support the data transfer from CFC, SMC, MSC and SDC to EP2 buffer directly.
SD/MMC: the built-in SD controller (SDC) supports both SD and MMC devices.
Flash Media Controller Data Multiplexer (FMC DATA MUX): The multiplexer to enable the different data
path from the different flash media controllers (CFC, SMC, MSC and SDC).
SMSC USB2223-03
Page 5
DATASHEET
Revision 1.2 (06-13-06)
5 Page 
Bus Powered USB2.0 Flash Media Controller
Datasheet
NAME
CF Hardware
Reset
CF IO Read
SYMBOL
CF_nRESET
CF_nIOR
CF IO Write
Strobe
CF_nIOW
SM Write
Protect
SM Address
Strobe
SM Command
Strobe
SM Data7-0
SM_nWP
SM_ALE
SM_CLE
SM_D[7:0]
SM Read
Enable
SM Write
Enable
SM Write
Protect Switch
SM Busy or
Data Ready
SM_nRE
SM_nWE
SM_nWPS
SM_nB/R
SM Chip
Enable
SM Card
Detection
MS Bus State
SM_nCE
SM_nCD
MS_BS
MS System
Data In/Out
MS_SDIO
/MS_D0
MS System
Data In/Out
MS_D1
MS System
Data In/Out
MS_D[3:2]
MS Card
Insertion
MS_INS
BUFFER
TYPE
DESCRIPTION
O8 This pin is an active low hardware reset signal to CF
device.
O8 This pin is an active low read strobe signal for CF device,
when the CFC is enabled.
O8 This pin is an active low write strobe signal for CF device,
when the CFC is enabled.
SmartMedia INTERFACE
O8 This pin is an active low write protect signal for the SM
device, when the SMC is enabled.
O8 This pin is an active high Address Latch Enable signal for
the SM device, when the SMC is enabled.
O8 This pin is an active high Command Latch Enable signal
for the SM device, when the SMC is enabled.
I/O8 These pins are the bi-directional data signal SM_D7-
SM_D0, when the SMC is enabled.
O8 This pin is an active low read strobe signal for SM device,
when SMC is enabled.
O8 This pin is an active low write strobe signal for SM device,
when SMC is enabled.
IPU A write-protect seal is detected, when this pin is low.
I This pin is connected to the BSY/RDY pin of the SM
device.
An external pull-up resistor is required on this signal. The
pull-up resistor should be attached to the power of
SM/NAND flash device.
O8 This pin is the active low chip enable signal to the SM
device.
IPU This is the card detection signal from SM device to
indicate if the device is inserted.
MEMORY STICK INTERFACE
O8 This pin is connected to the BS pin of the MS device.
It is used to control the Bus States 0, 1, 2 and 3 (BS0,
BS1, BS2 and BS3) of the MS device.
I/O8 This pin is a bi-directional data signal for the MS device.
Most significant bit (MSB) of each byte is transmitted first
by either MSC or MS device.
IO8PD
The bi-directional data signal has an internal weak pull-
down resistor.
This pin is a bi-directional data signal for the MS device.
The bi-directional data signal has an internal weak pull-
down resistor that is internally controlled.
I/O8 This pin is a bi-directional data signal for the MS device.
The bi-directional data signal has an internal weak pull-
down resistor.
IPU This pin is the card detection signal from the MS device to
indicate, if the device is inserted.
SMSC USB2223-03
Page 11
DATASHEET
Revision 1.2 (06-13-06)
11 Page | ||
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