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PDF USB2005 Data sheet ( Hoja de datos )

Número de pieza USB2005
Descripción USB 2.0 ATA/ATAPI Controller
Fabricantes SMSC Corporation 
Logotipo SMSC Corporation Logotipo



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USB2005
USB 2.0 ATA/ATAPI
Controller with PD-DRM
PRODUCT FEATURES
Datasheet
„ Provides support for digital rights management for
portable devices (PD-DRM) via Mass Storage Class
SCSI Inquiry command as specified by Microsoft for
Windows Media Systems (WM-DRM). Reports all
media as Removable (HDDs only).
„ 2.5 Volt, Low Power Core Operation
„ 3.3 Volt I/O with 5V input tolerance
„ Supports a low-cost single 3.3V regulator design, by
using a 1N4001 diode to provide the 2.5V core
voltage (from the 3.3V supply)
„ Complete USB Specification 2.0 Compatibility
— Includes USB 2.0 Transceiver
— A Bi-directional Control and a Bi-directional Bulk
Endpoint are provided.
„ Complete System Solution for interfacing ATA or
ATAPI devices to USB 2.0 bus
— Supports USB Mass Storage Compliant Bootable BIOS
— Supports ATA6 Drive capacities up to 2048GB
— True UDMA Mode 4 transfer rates
— Support for ATAPI Devices:
– CD-ROM
– CD-R
– CD-RW
– DVD
– DVD/R/W
„ Support for sharing ATA/ATAPI drive with external
microprocessor for file playback in portable media
player applications
— Pin indication of USB bus SUSPEND state
— Control pin to force drive interface high impedance
state for drive sharing
„ 8051 8 bit microprocessor
— Provides low speed control functions
— 30 Mhz execution speed at 4 cycles per instruction
average
— 768 Bytes of internal SRAM for general purpose
scratchpad or program execution while re-flashing
external ROM
„ Double Buffered Bulk Endpoint
— Bi-directional 512 Byte Buffer for Bulk Endpoint
— 64 Byte RX Control Endpoint Buffer
— 64 Byte TX Control Endpoint Buffer
„ Internal or External Program Memory Interface
— 48K Byte Internal ROM or optional 64K Byte External
Code Space using Flash, SRAM, or EPROM Memory
„ On Board 12Mhz Crystal Driver Circuit
„ Internal PLL for 480Mhz USB 2.0 Sampling, 30Mhz
MCU clock, and 60Mhz ATA clock
„ Supports firmware upgrade via USB bus if "boot
block" Flash program memory is used for optional
external program memory
„ Optional Serial EEPROM interface for VID/PID/Serial
Number Customization
„ 100 Pin, STQFP Lead-free RoHS Compliant Package
(12x12x1.4mm body, 14x14mm footprint)
SMSC USB2005
DATASHEET
Revision 0.2 (01-16-07)

1 page




USB2005 pdf
USB 2.0 ATA/ATAPI Controller with PD-DRM
Datasheet
List of Tables
Table 1.1 Operational Conditions to Electrically Detach USB2005 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 2.1 USB2005 Pin Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 5.1 USB2005 Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 5.2 USB2005 Buffer Type Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 7.1 SCSI INQUIRY Command Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 7.2 Data Buffer Returned for Device Serial Number Query. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
SMSC USB2005
5
DATASHEET
Revision 0.2 (01-16-07)

5 Page





USB2005 arduino
USB 2.0 ATA/ATAPI Controller with PD-DRM
Datasheet
Table 5.1 USB2005 Pin Descriptions (continued)
Termination Resistor RTERM
Full Speed USB
Data
FS-
FS+
IO-U
A precision 1.5Kohm precision resistor is
attached to this pin from a 3.3V supply.
These pins connect to the USB- and USB+
pins through 31.6 ohm series resistors.
MEMORY/IO INTERFACE
Memory Data Bus
MD[7:0]
Memory Address
Bus
MA[15:0]
Memory Write Strobe nMWR
Memory Read
Strobe
nMRD
IO Read Strobe
nIOR
IO Write Strobe
nIOW
IO12PU
O12
O12
O12
O12
O12
When ROMEN=0, these signals are used to
transfer data between the internal CPU and the
external program memory. When ROMEN=1, a
weak internal pull up is activated to prevent
these pins from floating.
These signals address memory locations within
the external memory.
Program Memory Write; active low
Program Memory Read; active low
XDATA space Read; active low
XDATA space Write; active low
MISC
Crystal
Input/External Clock
Input
XTAL1/
CLKIN
Crystal Output
XTAL2
Clock Output
CLKOUT
Internal ROM Enable ROMEN
ICLKx
OCLKx
O8
IP
12Mhz Crystal or external clock input.
This pin can be connected to one terminal of
the crystal or can be connected to an external
12Mhz clock when a crystal is not used.
12Mhz Crystal
This is the other terminal of the crystal, or left
open when an external clock source is used to
drive XTAL1/CLKIN. It may not be used to
drive any external circuitry other than the
crystal circuit.
This pin produces a 30Mhz clock signal
independent of the processor clock divider. It is
held inactive and low whenever the internal
processor clock is stopped or is being obtained
from the ring oscillator.
When left unconnected or tied high, the
USB97C202 uses the internal ROM for
program execution. When tied low, an external
program memory should be connected to the
memory/data bus. The state of this pin latched
internally on the rising edge of nRESET.
SMSC USB2005
11
DATASHEET
Revision 0.2 (01-16-07)

11 Page







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