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PDF EL8302 Data sheet ( Hoja de datos )
| Número de pieza | EL8302 | |
| Descripción | Rail-to-Rail Amplifier | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
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®
Data Sheet
May 6, 2005
EL8302
FN7348.2
500MHz Rail-to-Rail Amplifier
The EL8302 represents a triple rail-to-rail amplifier with a -
3dB bandwidth of 500MHz and slew rate of 600V/µs.
Running off a very low supply current of 5.6mA per channel,
the EL8302 also features inputs that go to 0.15V below the
VS- rail.
The EL8302 includes a fast-acting disable/power-down
circuit. With a 25ns disable and a 200ns enable, the EL8302
is ideal for multiplexing applications.
The EL8302 is designed for a number of general purpose
video, communication, instrumentation, and industrial
applications. The EL8302 is available in an 16-pin SO and
16-pin QSOP packages and is specified for operation over
the -40°C to +85°C temperature range.
Pinout
EL8302
(16-PIN SO, QSOP)
TOP VIEW
INA+ 1
CEA 2
VS- 3
CEB 4
INB+ 5
NC 6
CEC 7
INC+ 8
16 INA-
-
+
15 OUTA
14 VS+
+
-
13 OUTB
12 INB-
11 NC
+
-
10 OUTC
9 INC-
Features
• 500MHz -3dB bandwidth
• 600V/µs slew rate
• Low supply current = 5.6mA per amplifier
• Supplies from 3V to 5.5V
• Rail-to-rail output
• Input to 0.15V below VS-
• Fast 25ns disable
• Low cost
• Pb-Free available (RoHS compliant)
Applications
• Video amplifiers
• Portable/hand-held products
• Communications devices
Ordering Information
PART
NUMBER
PACKAGE TAPE & REEL PKG. DWG. #
EL8302IS 16-Pin SO - MDP0027
EL8302IS-T7
16-Pin SO
7”
MDP0027
EL8302IS-T13
16-Pin SO
13”
MDP0027
EL8302ISZ
16-Pin SO
-
MDP0027
(See Note)
(Pb-free)
EL8302ISZ-T7
16-Pin SO
7”
MDP0027
(See Note)
(Pb-free)
EL8302ISZ-T13 16-Pin SO 13” MDP0027
(See Note)
(Pb-free)
EL8302IU
16-Pin QSOP
-
MDP0040
EL8302IU-T7
16-Pin QSOP
7”
MDP0040
EL8302IU-T13 16-Pin QSOP
13”
MDP0040
EL8302IUZ
(See Note)
16-Pin QSOP
(Pb-free)
-
MDP0040
EL8302IUZ-T7
(See Note)
16-Pin QSOP
(Pb-free)
7”
MDP0040
EL8302IUZ-T13 16-Pin QSOP
(See Note)
(Pb-free)
13”
MDP0040
NOTE: Intersil Pb-free products employ special Pb-free material sets;
molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with
both SnPb and Pb-free soldering operations. Intersil Pb-free products
are MSL classified at Pb-free peak reflow temperatures that meet or
exceed the Pb-free requirements of IPC/JEDEC J STD-020.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-352-6832 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2003, 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
1 page  
Typical Performance Curves (Continued)
EL8302
5
4
VS=5V
AV=1
3 RL=1kΩ
2 VOP-P=200mV
CL=4.8pF
CL=3.7pF
1
0
-1 CL=1.5pF
-2
-3
-4
-5
1M
10M
100M
FREQUENCY (Hz)
1G
FIGURE 7. SMALL SIGNAL FREQUENCY RESPONSE vs CL
16
14
VS=5V
AV=2
12 RL=1kΩ
10 RF=RG=1kΩ
CL=20pF
CL=28.5pF
CL=13.5pF
8
6
4
2 CL=10pF
0 CL=1.5pF
-2
-4
1M
10M
100M
1G
FREQUENCY (Hz)
FIGURE 8. SMALL SIGNAL FREQUENCY RESPONSE FOR
VARIOUS CL
110
RL=1kΩ
70 RL=150Ω
30
RL=150Ω
-10
RL=1kΩ
-50
405
315
225
135
45
-90
1K
10K 100K 1M 10M 100M
FREQUENCY (Hz)
-45
1G
FIGURE 9. OPEN LOOP GAIN AND PHASE vs FREQUENCY
-10
-30
-50 PSRR-
-70 PSRR+
-90
-110
1K
10K 100K
1M
10M
FREQUENCY (Hz)
FIGURE 11. POWER SUPPLY REJECTION
RATIO vs FREQUENCY
100M
5
-10
VS=5V
AV=1
-30 RL=1kΩ
-50
-70
-90
-110
1K
10K 100K 1M 10M 100M
FREQUENCY (Hz)
1G
FIGURE 10. DISABLED OUTPUT ISOLATION FREQUENCY
RESPONSE
550
500
450
RL=1kΩ
CL=1.5pF
400
AV=1
350
300
250
200 AV=2
150
100
3 3.5 4 4.5 5 5.5
VS (V)
FIGURE 12. SMALL SIGNAL BANDWIDTH vs
SUPPLY VOLTAGE
5 Page 
EL8302
avoided because of their additional series inductance. Use
of sockets should also be avoided if possible. Sockets add
parasitic inductance and capacitance that can result in
compromised performance. Minimizing parasitic capacitance
at the amplifier’s inverting input pin is very important. The
feedback resistor should be placed very close to the
inverting input pin. Strip line design techniques are
recommended for the signal traces.
Typical Applications
VIDEO SYNC PULSE REMOVER
Many CMOS analog to digital converters have a parasitic
latch up problem when subjected to negative input voltage
levels. Since the sync tip contains no useful video
information and it is a negative going pulse, we can chop it
off. Figure 31 shows a gain of 2 connections for EL8302.
Figure 32 shows the complete input video signal applied at
the input, as well as the output signal with the negative going
sync pulse removed.
VIN
75Ω
5V
+ VS+
-
VS-
75Ω
1K
1K
VOUT
75Ω
VIN1 is passed through to the output when the ENABLE
signal is low and turns off in about 25ns when the ENABLE
signal is high. About 200ns later, Amp B turns on and VIN2 is
passed through to the output. The break-before-make
operation ensures that more than one amplifier isn’t trying to
drive the bus at the same time.
B
2MHz
1VP-P
75Ω
+2.5V
+
-
-2.5V
1K
A
2MHz
2VP-P
75Ω
1K
+2.5V
+
-
-2.5V
75Ω
VOUT
75Ω
1K
ENABLE
1K
FIGURE 33. TWO TO ONE MULTIPLEXER
FIGURE 31. SYNC PULSE REMOVER
VIN
VOUT
1V
0.5V
0V
1V
0.5V
0V
M = 10µs/DIV
FIGURE 32. VIDEO SIGNAL
MULTIPLEXER
Besides the normal power down usage, the ENABLE pin of
the EL8302 can be used for multiplexing applications. Figure
33 shows two channels with the outputs tied together, driving
a back terminated 75Ω video load. A 2VP-P 2MHz sine wave
is applied to Amp A and a 1VP-P 2MHz sine wave is applied
to Amp B. Figure 34 shows the ENABLE signal and the
resulting output waveform at VOUT. Observe the break-
before-make operation of the multiplexing. Amp A is on and
ENABLE
A
0V
-0.5V
-1.5V
-2.5V
1V
0V
B -1V
M = 50ns/DIV
FIGURE 34.
SINGLE SUPPLY VIDEO LINE DRIVER
The EL8302 is wideband rail-to-rail output op amplifiers with
large output current, excellent dG, dP, and low distortion that
allow them to drive video signals in low supply applications.
Figure 35 is the single supply non-inverting video line driver
configuration and Figure 36 is the inverting video ling driver
configuration. The signal is AC coupled by C1. R1 and R2
are used to level shift the input and output to provide the
largest output swing. RF and RG set the AC gain. C2 isolates
the virtual ground potential. RT and R3 are the termination
resistors for the line. C1, C2 and C3 are selected big enough
to minimize the droop of the luminance signal.
11
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet EL8302.PDF ] | |
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