PDF EM562161 Data sheet ( Hoja de datos )

Número de pieza	EM562161
Descripción	128K x 16 Low Power SRAM
Fabricantes	Etron Technology
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No Preview Available ! EtronTech EM562161 128K x 16 Low Power SRAM Preliminary, Rev 1.0 07/2001 Features • Single power supply voltage of 2.7V to 3.6V • Power down features using CE1# and CE2 • Low operating current : 30mA(max for 55 ns) • Maximum Standby current : 10µA at 3.6 V • Data retention supply voltage: 1.5V to 3.6V • Direct TTL compatibility for all input and output • Wide operating temperature range: -40°C to 85°C • Package type: 48-ball TFBGA, 6x8mm Ordering Information Part Number EM562161BC-55 EM562161BC-70 Speed 55 ns 70 ns IDDS2 10 µA 10 µA Package 6x8 BGA 6x8 BGA Pin Description Symbol A0 - A16 DQ0 - DQ15 CE1#, CE2 OE# WE# LB#, UB# GND VDD NC Function Address Inputs Data Inputs / Outputs Chip Enable Inputs Output Enable Read / Write Control Input Data Byte Control Inputs Ground Power Supply No Connection Overview The EM562161 is a 2,097,152-bit SRAM organized as 131,072 words by 16 bits. It is designed with advanced CMOS technology. This Device operates from a single 2.7V to 3.6V power supply. Advanced circuit technology provides both high speed and low power. It is automatically placed in low-power mode when chip enable (CE1#) is asserted high or (CE2) is asserted low. There are three control inputs. CE1# and CE2 are used to select the device and for data retention control, and output enable (OE#) provides fast memory access. Data byte control pin (LB#,UB#) provides lower and upper byte access. This device is well suited to various microprocessor system applications where high speed, low power and battery backup are required. And, with a guaranteed operating range from -40°C to 85°C, the EM562161 can be used in environments exhibiting extreme temperature conditions. Pin Configuration 48-Ball BGA (CSP), Top View 12 34 A LB # O E# A0 A1 56 A2 CE 2 B DQ8 UB# A3 A4 CE1 # DQ 0 C DQ9 DQ10 A5 A6 DQ1 DQ2 D GN D DQ 1 1 NC A7 DQ3 VD D E VDD DQ12 NC A 16 DQ4 GND F DQ1 4 DQ1 3 A 14 A 15 DQ5 DQ6 G DQ 1 5 NC A 12 A 13 WE# DQ7 H NC A8 A9 A 10 A1 1 NC Etron Technology, Inc. No. 6, Technology Rd. V, Science-Based Industrial Park, Hsinchu, Taiwan 30077, R.O.C. TEL: (886)-3-5782345 FAX: (886)-3-5778671 Etron Technology, Inc., reserves the right to make changes to its products and specifications without notice. 1 page EtronTech EM562161 AC Characteristics and Operating Conditions (Ta = -40° C to 85° C, VDD = 2.7V to 3.6V) Read Cycle Symbol Parameter EM562161 -55 -70 Min Max Min Max Unit tRC tAA tCO1 tCO2 tOE tBA tLZ tOLZ tBLZ tHZ tOHZ tBHZ tOH Write Cycle Read cycle time Address access time Chip Enable (CE1#) Access Time Chip Enable (CE2) Access Time Output enable access time Data Byte Control Access Time Chip Enable Low to Output in Low-Z Output enable Low to Output in Low-Z Data Byte Control Low to Output in Low-Z Chip Enable High to Output in High-Z Output Enable High to Output in High-Z Data Byte Control High to Output in High-Z Output Data Hold Time Symbol Parameter 55 − 70 − − 55 − 70 − 55 − 70 − 55 − 70 − 25 − 35 − 55 − 70 10 − 10 − 3−3− 5−5− − 20 − 25 − 20 − 25 − 20 − 25 10 − 10 − ns EM562161 -55 -70 Min Max Min Max Unit tWC tWP tCW tBW tAS tWR tWHZ tOW tDS tDH Write cycle time Write pulse width Chip Enable to end of write Data Byte Control to end of Write Address setup time Write Recovery time WE# Low to Output in High-Z WE# High to Output in Low-Z Data Setup Time Data Hold Time 55 − 70 − 40 − 55 − 45 − 60 − 45 − 60 − 0−0− 0−0− − 25 − 30 5−5− 25 − 30 − 0−0− ns AC Test Condition • Output load : 50pF + one TTL gate • Input pulse level : 0.4V, 2.4V • Timing measurements : 0.5 x VDD • tR, tF : 5ns Preliminary 5 Rev 1.0 July 2001 5 Page EtronTech Data Retention Characteristics (Ta = -40° C to 85° C) Symbol Parameter VDR Data Retention Supply Voltage CE1# ≥ VDD - 0.2V, CE2 ≤ 0.2V, VIN ≥ VDD - 0.2V or VIN ≤ 0.2V IDR Data Retention Current VDD = 1.5V, CE1# ≥ VDD - 0.2V, CE2 ≤ 0.2V, VIN ≥ VDD - 0.2V or VIN ≤ 0.2V tSDR Chip Deselect to Data Retention Mode Time tRDR Recovery Time CE1# Controlled Data Retention Mode V DD 2.7V tSD R D a ta R e t e n t io n M o d e EM562161 Min Typ Max Unit 1.5 − 3.6 V − 0.5 3.0 µA 0 − − ns tRC − − ns tR D R 2.2V V DR CE1 # GND CE2 Controlled Data Retention Mode V DD 2.7V CE 2 tS DR VDR 0.4 V G ND N ote 1 Data Retention M ode N ote 2 tR D R Note: 1. CE1# ≥ VDD – 0.2V or UB# = LB# ≥ VDD – 0.2V 2. CE2 ≤ 0.2V Preliminary 11 Rev 1.0 July 2001 11 Page

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