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Número de pieza | FDS8876 | |
Descripción | N-Channel MOSFET | |
Fabricantes | Fairchild Semiconductor | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de FDS8876 (archivo pdf) en la parte inferior de esta página. Total 12 Páginas | ||
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FDS8876
N-Channel PowerTrench® MOSFET
30V, 12.5A, 8.2mΩ
tm
Features
rDS(on) = 8.2mΩ, VGS = 10V, ID = 12.5A
rDS(on) = 10.2mΩ, VGS = 4.5V, ID = 11.4A
High performance trench technology for extremely low
rDS(on)
Low gate charge
High power and current handling capability
RoHS Compliant
General Description
This N-Channel MOSFET has been designed specifically to
improve the overall efficiency of DC/DC converters using
either synchronous or conventional switching PWM
controllers. It has been optimized for low gate charge, low
rDS(on) and fast switching speed.
Applications
DC/DC converters
Branding Dash
1
2
3
4
SO-8
5
54
63
72
81
©2007 Fairchild Semiconductor Corporation
FDS8876 Rev. B
1
www.fairchildsemi.com
1 page Typical Characteristics TJ = 25°C unless otherwise noted
100
If R = 0
tAV
If R
tAV
=
=≠
(0L)(IAS)/(1.3*RATED BVDSS
(L/R)ln[(IAS*R)/(1.3*RATED
- VDD)
BVDSS
-
VDD)
+1]
10 STARTING TJ = 25oC
STARTING TJ = 150oC
50
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
40 VDD = 15V
30 TJ = 25oC
20
TJ = 150oC
10
TJ = -55oC
1
0.01
0.1 1 10
tAV, TIME IN AVALANCHE (ms)
100
NOTE: Refer to Fairchild Application Notes AN7514 and AN7515
Figure 5. Unclamped Inductive Switching
Capability
0
2.0
2.5 3.0
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 6. Transfer Characteristics
3.5
50
VGS = 10V
VGS = 5V
40
VGS = 3.5V
30
VGS = 3V
20
50
40
ID = 12.5A
30
20
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
10
0
0
TA = 25oC
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
0.2 0.4 0.6
VDS, DRAIN TO SOURCE VOLTAGE (V)
0.8
Figure 7. Saturation Characteristics
10
ID = 1A
0
2
468
VGS, GATE TO SOURCE VOLTAGE (V)
10
Figure 8. Drain to Source On Resistance vs Gate
Voltage and Drain Current
1.6
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
1.4
1.2
VGS = VDS, ID = 250µA
1.0
1.2
0.8
1.0
0.8
0.6
-80
VGS = 10V, ID = 12.5A
-40 0 40 80 120
TJ, JUNCTION TEMPERATURE (oC)
160
Figure 9. Normalized Drain to Source On
Resistance vs Junction Temperature
0.6
0.4
-80
-40 0
40 80 120 160
TJ, JUNCTION TEMPERATURE (oC)
200
Figure 10. Normalized Gate Threshold Voltage vs
Junction Temperature
©2007 Fairchild Semiconductor Corporation
FDS8876 Rev. B
5
www.fairchildsemi.com
5 Page SPICE Thermal Model
REV January 2005
FDS8876
Copper Area =1.0 in2
CTHERM1 TH 8 2.0e-3
CTHERM2 8 7 5.0e-3
CTHERM3 7 6 1.0e-2
CTHERM4 6 5 4.0e-2
CTHERM5 5 4 9.0e-2
CTHERM6 4 3 2e-1
CTHERM7 3 2 1
CTHERM8 2 TL 3
RTHERM1 TH 8 1e-1
RTHERM2 8 7 5e-1
RTHERM3 7 6 1
RTHERM4 6 5 5
RTHERM5 5 4 8
RTHERM6 4 3 12
RTHERM7 3 2 18
RTHERM8 2 TL 25
SABER Thermal Model
SABER thermal model FDS8876
Copper Area = 1.0 in2
template thermal_model th tl
thermal_c th, tl
{
ctherm.ctherm1 th 8 =2.0e-3
ctherm.ctherm2 8 7 =5.0e-3
ctherm.ctherm3 7 6 =1.0e-2
ctherm.ctherm4 6 5 =4.0e-2
ctherm.ctherm5 5 4 =9.0e-2
ctherm.ctherm6 4 3 =2e-1
ctherm.ctherm7 3 2 1
ctherm.ctherm8 2 tl 3
rtherm.rtherm1 th 8 =1e-1
rtherm.rtherm2 8 7 =5e-1
rtherm.rtherm3 7 6 =1
rtherm.rtherm4 6 5 =5
rtherm.rtherm5 5 4 =8
rtherm.rtherm6 4 3 =12
rtherm.rtherm7 3 2 =18
rtherm.rtherm8 2 tl =25
}
RTHERM1
RTHERM2
RTHERM3
RTHERM4
RTHERM5
RTHERM6
RTHERM7
RTHERM8
COMPONANT
CTHERM6
CTHERM7
CTHERM8
RTHERM6
RTHERM7
RTHERM8
0.04 in2
1.2e-1
0.5
1.3
26
39
55
TABLE 1. THERMAL MODELS
0.28 in2
0.52 in2
1.5e-1
2.0e-1
1.0 1.0
2.8 3.0
20 15
24 21
38.7 31.3
th JUNCTION
CTHERM1
8
CTHERM2
7
CTHERM3
6
CTHERM4
5
CTHERM5
4
CTHERM6
3
CTHERM7
2
CTHERM8
tl CASE
0.76 in2
2.0e-1
1.0
3.0
13
19
29.7
1.0 in2
2.0e-1
1.0
3.0
12
18
25
©2007 Fairchild Semiconductor Corporation
FDS8876 Rev. B
11
www.fairchildsemi.com
11 Page |
Páginas | Total 12 Páginas | |
PDF Descargar | [ Datasheet FDS8876.PDF ] |
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