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PDF FAN2106 Data sheet ( Hoja de datos )
| Número de pieza | FAN2106 | |
| Descripción | TinyBuck 6A 24V Input Integrated Synchronous Buck Regulator | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de FAN2106 (archivo pdf) en la parte inferior de esta página. Total 14 Páginas | ||
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April 2007
FAN2106 — TinyBuck™
6A, 24V Input Integrated Synchronous Buck Regulator
Features
Description
Over 95% efficiency
Internal power MOSFETs:
High-side RDS(ON) = 30mΩ
Low-side RDS(ON) = 14mΩ
Integrated low-side Schottky diode
Programmable frequency operation
The FAN2106 TinyBuckTM is an easy-to-use, cost and
space-efficient, synchronous buck solution. It enables
designers to solve high current requirements in a small
area with minimal external components.
External programming of clock frequency, current limit,
and loop response allows for optimization and flexibility
selecting output filter components and transient response.
Power-good signal
Wide input range: 3.0V to 24V
The summing current mode modulator uses lossless
current sensing for current feedback and over-current,
and includes voltage feedforward.
Output voltage range: 0.8V to 90%VIN
Input under-voltage lockout (UVLO)
Programmable over-current protection
Fairchild’s advanced BiCMOS power process, combined
with a thermally efficient MLP package, provides low-
RDS(ON) internal MOSFETs and the ability to dissipate
highwww.DataSheet4U.com power in a small package.
Under-voltage, over-voltage, and thermal protection
Selectable light-load power-saving mode
5x6mm, 25-pin, 3-pad MLP
Under-voltage, thermal shutdown, and power-good are
blanked at start-up, but protect the device from damage
during fault conditions.
Applications
Thin and light Notebook PCs
Graphics cards
Battery-powered equipment
Set-top box
Point-of-load regulation
Ordering Information
Operating
Part Number Temperature Range
FAN2106MPX
-10°C to 85°C
FAN2106EMPX
-40°C to 85°C
Pb-Free
Yes
Yes
Package
Molded Leadless Package (MLP) 5x6mm
Molded Leadless Package (MLP) 5x6mm
Packing
Method
Tape and Reel
Tape and Reel
© 2006 Fairchild Semiconductor Corporation
FAN2106 Rev. 1.0.1
www.fairchildsemi.com
1 page  
Electrical Specifications
Recommended operating conditions are the result of using the circuit shown in Figure 1 unless otherwise noted.
Parameter
Conditions
Min.
Power Supplies
VCC Current
VCC UVLO Threshold
SW = Open, FB = 0.7V, VCC = 5V,
FSW = 600KHz
Shutdown: EN=0, VCC = 5V
Power Saving Mode, VCC = 5V, FMIN
Rising VCC
Hysteresis
4.1
Power Output Section
N-Channel (Q1) RDS(ON)
N-Channel (Q2) RDS(ON)
Oscillator
Frequency
Minimum On-Time(2)
Ramp Amplitude, pk–pk
Minimum Off-Time(2)
VCC = 5V, 25°C
VCC = 5V, 25°C
RT = 50KΩ
RT = 24KΩ
16VIN, 1.8VOUT, RT = 30KΩ,
RRAMP = 200KΩ
255
540
Reference
Reference Voltage (VFB)
FAN2106M, 25°C
FAN2106EM, 25°C
794
795
Error Amplifier
DC Gain(2)
Gain Bandwidth Product(2)
Output Voltage (VCOMP)
Output Current, Sourcing
Output Current, Sinking
FB Bias Current
VCC = 5V
VCC = 5V
VCC = 5V
VCC = 5V, VCOMP = 2.2V
VCC = 5V, VCOMP = 1.2V
VFB = 0.8V, 25°C
80
12
0.4
1.5
0.8
-850
Protection and Shutdown
Current Limit
ILIM Current
Over-Temperature Shutdown
RILIM open
Die temperature
6
-11
Over-Temperature Hysteresis
Die temperature
Over-Voltage Threshold
2 consecutive clock cycles
110
Under-Voltage Shutdown
16 consecutive clock cycles
68
Fault Discharge Threshold
Measured at FB pin
Fault Discharge Hysteresis
Measured at FB pin (VFB ~500mV)
Note:
2. Specifications guaranteed by design and characterization; not production tested.
Typ. Max. Unit
8 12 mA
7 10 µA
2.2 4.5 mA
4.3 4.5 V
300 mV
30 35 mΩ
14 16 mΩ
300 345 KHz
600 660 KHz
50 65 nsec
0.53 V
100 150 nsec
800 806 mV
800 805 mV
85
15
2.2
1.2
-650
3.2
-450
dB
MHz
V
mA
mA
nA
8 10 A
-10 -9 µA
150 °C
25 °C
115 120 %VOUT
73 78 %VOUT
250 mV
250 mV
© 2006 Fairchild Semiconductor Corporation
FAN2106 Rev. 1.0.1
5
www.fairchildsemi.com
5 Page 
Calculating the Inductor Value
Typically the inductor is set for a ripple current (ΔIL) of
10% to 35% of the maximum DC load. Regulators
requiring fast transient response use a value on the high
side of this range, while regulators that require very low
output ripple and/or use high-ESR capacitors restrict
allowable ripple current:
ΔIL
=
VOUT
L
• (1- D)
•F
EQ. 5
where F is the oscillator frequency, and
L
=
VOUT • (1- D)
ΔIL • F
EQ. 6
Loop Compensation
The loop is compensated using a feedback network
around the error amplifier. Figure 21 shows a complete
Type-3 compensation network. Type-2 compensation
eliminates R3 and C3.
Setting the Ramp Resistor Value
The internal ramp voltage excursion (ΔVRAMP) during tON
should be set to 0.6V. RRAMP is approximately:
RRAMP(KΩ)
=
(VIN − 1.8) • VOUT
18x10−6 • VIN • F
−2
EQ. 7
where frequency (F) is expressed in KHz.
Setting the Current Limit
The FAN2106 uses its internal low-side MOSFET as the
current-sensing element. The current-limit threshold
voltage (VILIM) is compared to the voltage drop across
the low-side MOSFET, sampled at the end of each
PWM off-time/cycle.
The default threshold (ILIM open) is temperature
compensated.
The 10µA current sourced from the ILIM pin can be
used to establish a lower, temperature–dependent,
current-limit threshold by connecting an external resistor
(RILIM) to AGND:
RILIM(KΩ)
= 0.45 • RDS • KT • (IOUT
−
ΔIL
2
) +142.5
EQ. 8
where:
I = desired current limit set point in Amps,
RDS is expressed in mΩ,
KT = the normalized temperature coefficient of the
low-side MOSFET (Q2) from Figure 8.
After 16 consecutive, pulse-by-pulse, current-limit
cycles, the fault latch is set and the regulator shuts
down. Cycling VCC or EN restores operation after a
normal soft-start cycle (refer to Auto-Restart section).
The over-current protection fault latch is active during
the soft-start cycle.
Figure 21. Compensation Network
Since the FAN2106 employs summing current-mode
architecture, Type-2 compensation can be used for
many applications. For applications that require wide
loop bandwidth and/or use very low-ESR output
capacitors, Type-3 compensation may be required. The
AN-6033 spreadsheet calculator can be used to
calculate these component values.
Protection
The converter output is monitored and protected against
extreme overload, short-circuit, over-voltage, and under-
voltage conditions.
An internal “Fault Latch” is set for any fault intended to
shut down the IC. When the fault latch is set, the IC
discharges VOUT by enhancing the low-side MOSFET
until FB<0.25V. The MOSFET is not turned on again
unless FB>0.5V. This behavior discharges the output
without causing undershoot (negative output voltage).
0.25/0.5V
FB
FAULT
PWM LATCH
PWM GATE
DRIVE
Figure 22. Latched Fault Response
Under-Voltage Shutdown
If FB remains below the under-voltage threshold for 16
consecutive clock cycles, the fault latch is set and the
converter shuts down. This fault is prevented from
setting the fault latch during soft-start.
Over-Voltage Protection / Shutdown
If FB exceeds 115% • VREF for two consecutive clock
cycles, the fault latch is set and shutdown occurs.
A shorted high-side MOSFET condition is detected
when SW voltage exceeds ~0.7V while the low-side
© 2006 Fairchild Semiconductor Corporation
FAN2106 Rev. 1.0.1
11
www.fairchildsemi.com
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet FAN2106.PDF ] | |
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