DataSheet.es    


PDF OP37GS Data sheet ( Hoja de datos )

Número de pieza OP37GS
Descripción Low Noise / Precision / High Speed Operational Amplifier
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



Hay una vista previa y un enlace de descarga de OP37GS (archivo pdf) en la parte inferior de esta página.


Total 16 Páginas

No Preview Available ! OP37GS Hoja de datos, Descripción, Manual

a
Low Noise, Precision, High Speed
Operational Amplifier (A VCL > 5)
OP37
FEATURES
Low Noise, 80 nV p-p (0.1 Hz to 10 Hz)
3 nV/Hz @ 1 kHz
Low Drift, 0.2 V/؇C
High Speed, 17 V/s Slew Rate
63 MHz Gain Bandwidth
Low Input Offset Voltage, 10 V
Excellent CMRR, 126 dB (Common-Voltage @ 11 V)
High Open-Loop Gain, 1.8 Million
Replaces 725, OP-07, SE5534 In Gains > 5
Available in Die Form
GENERAL DESCRIPTION
The OP37 provides the same high performance as the OP27,
but the design is optimized for circuits with gains greater than
five. This design change increases slew rate to 17 V/µs and
gain-bandwidth product to 63 MHz.
The OP37 provides the low offset and drift of the OP07
plus higher speed and lower noise. Offsets down to 25 µV and
drift of 0.6 µV/°C maximum make the OP37 ideal for preci-
sion instrumentation applications. Exceptionally low noise
(en= 3.5 nV/ @ 10 Hz), a low 1/f noise corner frequency of
2.7 Hz, and the high gain of 1.8 million, allow accurate
high-gain amplification of low-level signals.
The low input bias current of 10 nA and offset current of 7 nA
are achieved by using a bias-current cancellation circuit. Over
the military temperature range this typically holds IB and IOS
to 20 nA and 15 nA respectively.
The output stage has good load driving capability. A guaranteed
swing of 10 V into 600 and low output distortion make the
OP37 an excellent choice for professional audio applications.
PSRR and CMRR exceed 120 dB. These characteristics, coupled
with long-term drift of 0.2 µV/month, allow the circuit designer
to achieve performance levels previously attained only by
discrete designs.
Low-cost, high-volume production of the OP37 is achieved by
using on-chip zener-zap trimming. This reliable and stable offset
trimming scheme has proved its effectiveness over many years of
production history.
The OP37 brings low-noise instrumentation-type performance to
such diverse applications as microphone, tapehead, and RIAA
phono preamplifiers, high-speed signal conditioning for data
acquisition systems, and wide-bandwidth instrumentation.
PIN CONNECTIONS
8-Lead Hermetic DIP
(Z Suffix)
Epoxy Mini-DIP
(P Suffix)
8-Lead SO
(S Suffix)
VOS TRIM 1
IN 2
+IN 3
V4
OP37
8 VOS TRIM
7 V+
6 OUT
5 NC
NC = NO CONNECT
SIMPLIFIED SCHEMATIC
R3
Q6
R1*
18
VOS ADJ.
R4
R2*
NON-INVERTING
INPUT (+)
INVERTING
INPUT (–)
Q1A Q1B
Q3
*R1 AND R2 ARE PERMANENTLY
ADJUSTED AT WAFER TEST FOR
MINIMUM OFFSET VOLTAGE.
Q2B Q2A
REV. A
C2
R23 R24
Q22 C1
Q21
Q23 Q24
R9
Q20 Q19
R12
R5 C3 C4
Q11 Q12
Q27
Q28
Q26
V+
Q46
OUTPUT
Q45
V–
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2002

1 page




OP37GS pdf
OP37
1. NULL
2. () INPUT
3. (+) INPUT
4. V
6. OUTPUT
7. V+
8. NULL
Wafer Test Limits (VS = ؎15 V, TA = 25؇C for OP37N, OP37G, and OP37GR devices; TA = 125؇C for OP37NT and OP37GT devices,
unless otherwise noted.)
Parameter
OP37NT
Symbol Conditions Limit
OP37N
Limit
OP37GT
Limit
OP37G OP37GR
Limit Limit
Unit
Input Offset
Voltage
Input Offset
VOS
Note 1
60
35 200 60 100
Current
Input Bias
IOS
50 35 85 50 75
Current
IB
Input Voltage
± 60 ± 40 ± 95 ± 55 ± 80
Range
IVR
± 10.3
± 11
± 10.3
± 11 ± 11
Common Mode
Rejection Ratio CMRR VCM = ± 11 V 108
114 100
106 100
µV MAX
nA MAX
nA MAX
V MIN
dB MIN
Power Supply
Rejection Ratio PSRR
Large-Signal
Voltage Gain
AVO
Output Voltage
Swing
VO
Power
Consumption Pd
TA = 25°C,
VS = ± 4 V to
± 18 V
10
TA = 125°C,
VS = ± 4.5 V to
± 18 V
16
RL 2 k,
VO = ± 10 V
RL 1 k,
VO = ± 10 V
RL 2 k
RL 600 k
600
± 11.5
VO = 0
10
1000
800
± 12
± 10
140
10
20
500
± 11
10 20
1000
800
± 12
± 10
140
700
± 11.5
± 10
170
µV/V MAX
µV/V MAX
V/mV MIN
V/mV MIN
V MIN
V MIN
mW MAX
NOTES
For 25°C characterlstics of OP37NT and OP37GT devices, see OP37N and OP37G characteristics, respectively.
Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed
for standard product dice. Consult factory to negotiate specifications based on dice lot qualification through sample lot assembly and testing.
REV. A
–5–

5 Page





OP37GS arduino
OP37
APPLICATIONS INFORMATION
OP37 Series units may be inserted directly into 725 and OP07
sockets with or without removal of external compensation or
nulling components. Additionally, the OP37 may be fitted to
unnulled 741type sockets; however, if conventional 741 nulling
circuitry is in use, it should be modified or removed to ensure
correct OP37 operation. OP37 offset voltage may be nulled to
zero (or other desired setting) using a potentiometer (see offset
nulling circuit).
The OP37 provides stable operation with load capacitances of
up to 1000 pF and ± 10 V swings; larger capacitances should be
decoupled with a 50 resistor inside the feedback loop. Closed
loop gain must be at least five. For closed loop gain between five
to ten, the designer should consider both the OP27 and the OP37.
For gains above ten, the OP37 has a clear advantage over the
unity stable OP27.
Thermoelectric voltages generated by dissimilar metals at the input
terminal contacts can degrade the drift performance. Best
operation will be obtained when both input contacts are main-
tained at the same temperature.
10kRP
V+
OP37
+
OUTPUT
V
Figure 1. Offset Nulling Circuit
Offset Voltage Adjustment
The input offset voltage of the OP37 is trimmed at wafer level.
However, if further adjustment of VOS is necessary, a 10 ktrim
potentiometer may be used. TCVOS is not degraded (see offset
nulling circuit). Other potentiometer values from 1 kto 1 M
can be used with a slight degradation (0.1 µV/°C to 0.2 µV/°C) of
TCVOS. Trimming to a value other than zero creates a drift of
approximately (VOS/300) µV/°C. For example, the change in TCVOS
will be 0.33 µV/°C if VOS is adjusted to 100 µV. The offset voltage
adjustment range with a 10 kpotentiometer is ± 4 mV. If smaller
adjustment range is required, the nulling sensitivity can be reduced
by using a smaller pot in conjunction with fixed resistors. For
example, the network below will have a ± 280 µV adjustment range.
1 4.7k1kPOT 4.7k
8
V+
Figure 2. TBD
+18V
OP37
18V
Figure 3. Burn-In Circuit
Noise Measurements
To measure the 80 nV peak-to-peak noise specification of the
OP37 in the 0.1 Hz to 10 Hz range, the following precautions
must be observed:
The device has to be warmed-up forat least five minutes. As
shown in the warm-up drift curve, the offset voltage typically
changes 4 µV due to increasing chip temperature after power up.
In the ten second measurement interval, these temperature-
induced effects can exceed tens of nanovolts.
For similar reasons, the device has to be well-shielded from
air currents. Shielding minimizes thermocouple effects.
Sudden motion in the vicinity of the device can also
“feedthrough” to increase the observed noise.
The test time to measure 0.1 Hz to l0 Hz noise should not
exceed 10 seconds. As shown in the noise-tester frequency
response curve, the 0.1 Hz corner is defined by only one zero.
The test time of ten seconds acts as an additional zero to eliminate
noise contributions from the frequency band below 0.1 Hz.
A noise-voltage-density test is recommended when measuring
noise on a large number of units. A 10 Hz noise-voltage-density
measurement will correlate well with a 0.1 Hz-to-10 Hz peak-to-peak
noise reading, since both results are determined by the white
noise and the location of the 1/f corner frequency.
Optimizing Linearity
Best linearity will be obtained by designing for the minimum
output current required for the application. High gain and
excellent linearity can be achieved by operating the op amp with
a peak output current of less than ± 10 mA.
Instrumentation Amplifier
A three-op-amp instrumentation amplifier provides high gain and
wide bandwidth. The input noise of the circuit below is 4.9 nV/Hz.
The gain of the input stage is set at 25 and the gain of the second
stage is 40; overall gain is 1000. The amplifier bandwidth of
800 kHz is extraordinarily good for a precision instrumentation
amplifier. Set to a gain of 1000, this yields a gain bandwidth
product of 800 MHz. The full-power bandwidth for a 20 V p-p
output is 250 kHz. Potentiometer R7 provides quadrature
trimming to optimize the instrumentation amplifier’s ac common-
mode rejection.
INPUT ()
R3
390
R2
100
INPUT (+)
+
OP37
R1
5k
0.1%
R5
500
0.1%
R4
5k
0.1%
C1
100pF
R8
20k
0.1%
R7
100k
OP37
+
VOUT
OP37
+
R6
500
0.1%
R9
19.8k
R10
500
NOTES:
TRIM R2 FOR AVCL = 1000
TRIM R10 FOR dc CMRR
TRIM R7 FOR MINIMUM V OUT AT V CM = 20V p-p, 10kHz
Figure 4a. TBD
REV. A
–11–

11 Page







PáginasTotal 16 Páginas
PDF Descargar[ Datasheet OP37GS.PDF ]




Hoja de datos destacado

Número de piezaDescripciónFabricantes
OP37GSLow Noise / Precision / High Speed Operational AmplifierAnalog Devices
Analog Devices
OP37GSLow-Noise Precision Operaional AmplifiersMaxim Integrated Products
Maxim Integrated Products

Número de piezaDescripciónFabricantes
SLA6805M

High Voltage 3 phase Motor Driver IC.

Sanken
Sanken
SDC1742

12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.

Analog Devices
Analog Devices


DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares,
permitiéndote verlos en linea o descargarlos en PDF.


DataSheet.es    |   2020   |  Privacy Policy  |  Contacto  |  Buscar