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PDF T5761 Data sheet ( Hoja de datos )

Número de pieza T5761
Descripción (T5760 / T5761) UHF ASK/FSK Receiver
Fabricantes ATMEL Corporation 
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UHF ASK/FSK Receiver
T5760 / T5761
Description
The T5760/T5761 is a multi-chip PLL receiver device
supplied in an SO20 package. It has been especially de-
veloped for the demands of RF low-cost data transmission
systems with data rates from 1 kBaud to 10 kBaud in
Manchester or Bi-phase code. The receiver is well suited
to operate with the Atmel Wireless & Microcontrollers’
PLL RF transmitter T5750. Its main applications are in
the areas of telemetering, security technology and key-
less-entry systems. It can be used in the frequency
receiving range of f0 = 868 to 870 MHz or f0 = 902 to
928 MHz for ASK or FSK data transmission. All the
statements made below refer to 868.3 MHz and
915.0 MHz applications.
Features
D Fully integrated LC-VCO and PLL loop filter
D Very high sensitivity with power matched LNA
D 30 dB image rejection
D High system IIP3 (–16 dBm), system 1-dB compres-
sion point (–25 dBm)
D High large-signal capability at GSM band (blocking
–30 dBm @ + 20 MHz, IIP3 = –12 dBm @ + 20 MHz)
D 5 V to 20 V automotive compatible data interface
D Data clock available for Manchester- and Bi-phase-
coded signals
D Programmable digital noise suppresion
D Receiving bandwidth BIF = 600 kHz for low cost
90-ppm crystals
D Low power consumption due to configurable polling
D Temperature range –40°C to 105°C
D ESD protection 2 kV HBM, 200 V MM
D Communication to mC possible via a single
bi-directional data line
D Low-cost solution due to high integration level with
minimum external circuitry requirements
System Block Diagram
UHF ASK/FSK
Remote control transmitter
T5750
XTO
PLL
VCO
Antenna
www.DataSheet4U.com
T5760/
T5761
UHF ASK/FSK
Remote control receiver
Demod.
Control
1...5
mC
Antenna
IF Amp
PLL
XTO
Power
amp.
LNA
VCO
Ordering Information
Extended Type Number
T5760-TG
T5760-TGQ
T5761-TG
T5761-TGQ
Figure 1. System block diagram
Package
SO20
SO20
SO20
SO20
Remarks
Tube, for 868 MHz ISM band
Taped and reeled, for 868 MHz ISM band
Tube, for 915 MHz ISM band
Taped and reeled, for 915 MHz ISM band
Rev. A2, 19-Oct-00
Preliminary Information
1 (32)

1 page




T5761 pdf
T5760 / T5761
and exhibits the best possible sensitivity and at the same
time power matching at RF_IN.
RSens can be connected to VS or GND via a µC. The
receiver can be switched from full sensitivity to reduced
sensitivity or vice versa at any time. In polling mode, the
receiver will not wake up if the RF input signal does not
exceed the selected sensitivity. If the receiver is already
active, the data stream at Pin DATA will disappear when
the input signal is lower than defined by the reduced
sensitivity. Instead of the data stream, the pattern accord-
ing to figure 5 is issued at Pin DATA to indicate that the
receiver is still active (see also figure 32).
DATA
t DATA_min
t DATA_L_max
Figure 5. Steady L state limited DATA output pattern
FSK/ASK Demodulator and Data Filter
The signal coming from the RSSI amplifier is converted
into the raw data signal by the ASK/FSK demodulator.
The operating mode of the demodulator is set via the bit
ASK/_FSK in the OPMODE register. Logic Lsets the
demodulator to FSK, applying Hto ASK mode.
In ASK mode an automatic threshold control circuit
(ATC) is employed to set the detection reference voltage
to a value where a good signal to noise ratio is achieved.
This circuit also implies the effective suppression of any
kind of in-band noise signals or competing transmitters.
If the S/N (ratio to suppress in-band noise signals) ex-
ceeds about 10 dB the data signal can be detected
properly, but better values are found for many modulation
schemes of the competing transmitter.
The FSK demodulator is intended to be used for an FSK
deviation of 10 kHz Df 100 kHz. In FSK mode the
data signal can be detected if the S/N (ratio to suppress
inband noise signals) exceeds about 2 dB. This value is
valid for all modulation schemes of a disturber signal.
The output signal of the demodulator is filtered by the
data filter before it is fed into the digital signal processing
circuit. The data filter improves the S/N ratio as its pass-
band can be adopted to the characteristics of the data
signal. The data filter consists of a 1st-order highpass and
a 2nd-order lowpass filter
The highpass filter cut-off frequency is defined by an
external capacitor connected to Pin CDEM. The cut-off
frequency of the highpass filter is defined by the follow-
ing formula:
fcu_DF + 2
p
1
30 kW
CDEM
In self-polling mode, the data filter must settle very
rapidly to achieve a low current consumption. Therefore,
CDEM cannot be increased to very high values if self-
polling is used. On the other hand CDEM must be large
enough to meet the data filter requirements according to
the data signal. Recommended values for CDEM are
given in the electrical characteristics.
The cut-off frequency of the lowpass filter is defined by
the selected baud-rate range (BR_Range). The
BR_Range is defined in the OPMODE register (refer to
chapter Configuration of the Receiver). The BR_Range
must be set in accordance to the used baud-rate.
The T5760/T5761 is designed to operate with data coding
where the DC level of the data signal is 50%. This is valid
for Manchester and Bi-phase coding. If other modulation
schemes are used, the DC level should always remain
within the range of VDC_min = 33% and VDC_max = 66%.
The sensitivity may be reduced by up to 2 dB in that
condition.
Each BR_Range is also defined by a minimum and a
maximum edge-to-edge time (tee_sig). These limits are
defined in the electrical characteristics. They should not
be exceeded to maintain full sensitivity of the receiver.
Receiving Characteristics
The RF receiver T5760/T5761 can be operated with and
without a SAW front-end filter. In a typical automotive
application, a SAW filter is used to achieve better selec-
tivity and large signal capability. The receiving frequency
response without a SAW front-end filter is illustrated in
figures 6 and 7. This example relates to ASK mode. FSK
mode exhibit similar behavior. The plots are printed rela-
tively to the maximum sensitivity. If a SAW filter is used,
an insertion loss of about 3 dB must be considered, but the
over all selectivity is much better.
When designing the system in terms of receiving band-
width, the LO deviation must be considered as it also
determines the IF center frequency. The total LO devi-
ation is calculated to be the sum of the deviation of the
crystal and the XTO deviation of the T5760/T5761. Low-
cost crystals are specified to be within ±90 ppm over
tolerance, temperature and aging. The XTO deviation of
the T5760/T5761 is an additional deviation due to the
XTO circuit. This deviation is specified to be ±30 ppm
worst case for a crystal with CM = 7 fF. If a crystal of
±90 ppm is used, the total deviation is ±120 ppm in that
case. Note that the receiving bandwidth and the IF-filter
bandwidth are equivalent in ASK mode but not in FSK
mode.
Rev. A2, 19-Oct-00
Preliminary Information
5 (32)

5 Page





T5761 arduino
T5760 / T5761
Digital Signal Processing
The data from the ASK/ FSK demodulator (Dem_out) is
digitally processed in different ways and as a result con-
verted into the output signal data. This processing
depends on the selected baud-rate range (BR_Range).
Figure 14 illustrates how Dem_out is synchronized by the
extended clock cycle TXClk. This clock is also used for the
bit-check counter. Data can change its state only after
TXClk has elapsed. The edge-to-edge time period tee of the
Data signal as a result is always an integral multiple of
TXClk.
The minimum time period between two edges of the data
TXClk
signal is limited to tee TDATA_min. This implies an effi-
cient suppression of spikes at the DATA output. At the
same time it limits the maximum frequency of edges at
DATA. This eases the interrupt handling of a connected
µC.
The maximum time period for DATA to stay Low is lim-
ited to TDATA_L_max. This function is employed to ensure
a finite response time in programming or switching off the
receiver via Pin DATA. TDATA_L_max is thereby longer
than the maximum time period indicated by the transmit-
ter data stream. Figure 16 gives an example where
Dem_out remains Low after the receiver has switched to
receiving mode.
Clock bitcheck
counter
Dem_out
Data_out (DATA)
tee
Figure 14. Synchronization of the demodulator output
Dem_out
Data_out (DATA)
tDATA_min
tee
tDATA_min
tee
tDATA_min
tee
IC_ACTIVE
Bit check
Dem_out
Data_out (DATA)
Startup mode
Figure 15. Debouncing of the demodulator output
Bitcheck mode
tDATA_min
Receiving mode
tDATA_L_max
Figure 16. Steady L state limited DATA output pattern after transmission
Rev. A2, 19-Oct-00
Preliminary Information
11 (32)

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