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PDF NCP5331 Data sheet ( Hoja de datos )

Número de pieza NCP5331
Descripción Two-Phase PWM Controller
Fabricantes ON Semiconductor 
Logotipo ON Semiconductor Logotipo



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No Preview Available ! NCP5331 Hoja de datos, Descripción, Manual

NCP5331
Two−Phase PWM
Controller with Integrated
Gate Drivers
The NCP5331 is a second−generation, two−phase, buck controller
that incorporates advanced control functions to power 64−bit AMD
Athlont processors and low voltage, high current power supplies.
Proprietary multiphase architecture guarantees balanced load−current
sharing, reduces output voltage and input current ripple, decreases
filter requirements and inductor values, and increases output current
slew rate. Traditional Enhanced V2t has been combined with an
internal PWM ramp and voltage feedback directly from VCORE to the
internal PWM comparator. These features and enhancements deliver
the fastest transient response, reduce output voltage jitter, provide
greater design flexibility and portability, and minimize overall
solution cost.
Advanced features include adjustable power−good delay,
programmable overcurrent shutdown timer, superior overvoltage
protection (OVP), and differential remote sensing. An innovative
overvoltage protection (OVP) scheme safeguards the CPU during
extreme situations including power up with a shorted upper MOSFET,
shorting of an upper MOSFET during normal operation, and loss of
the voltage feedback signal, COREFB+.
Features
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Reduced SMT Package Size (7 mm × 7 mm)
Enhanced V2 Control Method
Four On−Board Gate Drivers
Internal PWM Ramps
Differential Remote Voltage Sense
Fast Feedback Pin (VFFB)
5−Bit DAC with 0.8% System Tolerance
Timed Hiccup Mode Current Limit
Power Good Output with Programmable Delay
Advanced Overvoltage Protection (OVP)
Adjustable Output Voltage Positioning
150 kHz to 600 kHz Operation Set by Resistor
“Lossless” Current Sensing through Output Inductors
Independent Current Sense Amplifiers
5.0 V, 2 mA Reference Output
Pb−Free Package is Available*
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2005
March, 2005 − Rev. 12
1
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LQFP−32
FT SUFFIX
CASE 873A
MARKING DIAGRAMS
NCP5331
AWLYYWWx
32
1
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
x = G or G
*Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
ORDERING INFORMATION
Device
Package
Shipping
NCP5331FTR2
NCP5331FTR2G
LQFP−32 2000 Tape & Reel
LQFP−32 2000 Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Publication Order Number:
NCP5331/D

1 page




NCP5331 pdf
NCP5331
ELECTRICAL CHARACTERISTICS (0°C < TA < 70°C; 0°C < TJ < 125°C; 9.0 V < VCCL < 16 V; 9.0 V < VCCH < 20 V;
9.0 V < VCCL1 = VCCL2 < 14 V; CGATE = 3.3 nF, RROSC = 32.4 kW, CCOMP = 1.0 nF, C5V(REF) = 0.1 mF, DAC Code 01110 (1.2 V),
CVCC = 1.0 mF, 0.25 V ILIM 1.0 V; unless otherwise noted)
Characteristic
Test Conditions
Min Typ Max
Voltage Identification DAC
Voltage Identification (VID) Codes
VID4
0
VID3
0
VID2
0
VID1
0
VID0
0
00001
00010
00011
00100
00101
00110
00111
01000
01001
01010
01011
01100
01101
01110
01111
10000
10001
10010
10011
10100
10101
10110
10111
11000
11001
11010
11011
11100
11101
11110
11111
System Accuracy
Shutdown Time Delay
Input Threshold
VID Pin Bias Current
VID Pin Clamp Voltage
Measure VFB = COMP, −SEN = LGND
Percent deviation from programmed VID codes
VID = 11111
VID0−VID4
VID0−VID4
−0.8
5.0
1.00
12
1.550
1.525
1.500
1.475
1.450
1.425
1.400
1.375
1.350
1.325
1.300
1.275
1.250
1.225
1.200
1.175
1.150
1.125
1.100
1.075
1.050
1.025
1.000
0.975
0.950
0.925
0.900
0.875
0.850
0.825
0.800
Shutdown
10
1.25
25
2.3
0.8
15
1.50
40
2.6
Unit
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
%
ms
V
mA
V
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NCP5331 arduino
NCP5331
Figure 3. Block Diagram, Protection
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