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PDF 83C152JC Data sheet ( Hoja de datos )

Número de pieza 83C152JC
Descripción UNIVERSAL COMMUNICATION CONTROLLER 8-BIT MICROCONTROLLER
Fabricantes Intel Corporation 
Logotipo Intel Corporation Logotipo



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8XC152JA JB JC JD
UNIVERSAL COMMUNICATION CONTROLLER
8-BIT MICROCONTROLLER
X 8K Factory Mask Programmable ROM Available
Y Superset of 80C51 Architecture
Y Multi-Protocol Serial Communication
I O Port (2 048 Mbps 2 4 Mbps Max)
SDLC HDLC Only
CSMA CD and SDLC HDLC
User Definable Protocols
Y Full Duplex Half Duplex
Y MCS -51 Compatible UART
Y 16 5 MHz Maximum Clock Frequency
Y Multiple Power Conservation Modes
Y 64KB Program Memory Addressing
Y 64KB Data Memory Addressing
Y 256 Bytes On-Chip RAM
Y Dual On-Chip DMA Channels
Y Hold Hold Acknowledge
Y Two General Purpose Timer Counters
Y 5 or 7 I O Ports
Y 56 Special Function Registers
Y 11 Interrupt Sources
Y Available in 48 Pin Dual-in-Line Package
and 68 Pin Surface Mount PLCC
Package
(See Packaging Spec Order 231369)
The 80C152 which is based on the MCS -51 CPU is a highly integrated single-chip 8-bit microcontroller
designed for cost-sensitive high-speed serial communications It is well suited for implementing Integrated
Services Digital Networks (ISDN) emerging Local Area Networks and user defined serial backplane applica-
tions In addition to the multi-protocol communication capability the 80C152 offers traditional microcontroller
features for peripheral I O interface and control
Silicon implementations are much more cost effective than multi-wire cables found in board level parallel-to-
serial and serial-to-parallel converters The 83C152 contains in silicon all the features needed for the serial-
to-parallel conversion Other 83C152 benefits include 1) better noise immunity through differential signaling or
fiber optic connections 2) data integrity utilizing the stawnwdw.aDradtaShdeeets4Uig.cnomed in CRC checks and 3) better modulari-
ty of hardware and software designs All of these cost network parameter and real estate improvements
apply to 83C152 serial links between boards or systems and 83C152 serial links on a single board
Other brands and names are the property of their respective owners
Information in this document is provided in connection with Intel products Intel assumes no liability whatsoever including infringement of any patent or
copyright for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for such products Intel retains the right to make
changes to these specifications at any time without notice Microcomputer Products may have minor variations to this specification known as errata
COPYRIGHT INTEL CORPORATION 1995
October 1989
Order Number 270431-003

1 page




83C152JC pdf
8XC152JA JB JC JD
Pin
DIP PLCC(1)
48 2
24 3 33(2)
18-21 27-30
25-28 34-37
1-8 4-11
29-36 41-48
10- 17 14-16
18 19
23-25
Pin Description
VCC Supply voltage
VSS Circuit ground
Port 0 Port 0 is an 8-bit open drain bidirectional I O port As an output port each pin
can sink 8 LS TTL inputs Port 0 pins that have 1s written to them float and in that
state can be used as high-impedance inputs
Port 0 is also the multiplexed low-order address and data bus during accesses to
external program memory if EBEN is pulled low During accesses to external Data
Memory Port 0 always emits the low-order address byte and serves as the multiplexed
data bus In these applications it uses strong internal pullups when emitting 1s
Port 0 also outputs the code bytes during program verification External pullups are
required during program verification
Port 1 Port 1 is an 8-bit bidirectional I O port with internal pullups Port 1 pins that
have 1s written to them are pulled high by the internal pullups and in that state can be
used as inputs As inputs Port 1 pins that are externally being pulled low will source
current (IIL on the data sheet) because of the internal pullups
Port 1 also serves the functions of various special features of the 8XC152 as listed
below
Pin Name
Alternate Function
P1 0
P1 1
P1 2
P1 3
P1 4
P1 5
P1 6
GRXD
GTXD
DEN
TXC
RXC
HLD
HLDA
GSC data input pin
GSC data output pin
GSC enable signal for an external driver
GSC input pin for external transmit clock
GSC input pin for external receive clock
DMA hold input output
DMA hold acknowledge input output
Port 2 Port 2 is an 8-bit bidirectional I O port with internal pullups Port 2 pins that
have 1s written to them are pulled high by the internal pullups and in that state can be
used as inputs As inputs Port 2 pins that are externally being pulled low will source
current (IIL on the data sheet) bewcwwa.uDastaeShoefett4hU.ecominternal pullups
Port 2 emits the high-order address byte during fetches from external Program
Memory if EBEN is pulled low During accesses to external Data Memory that use 16-
bit addresses (MOVX DPTR and DMA operations) Port 2 emits the high-order
address byte In these applications it uses strong internal pullups when emitting 1s
During accesses to external Data Memory that use 8-bit addresses (MOVX Ri)
Port 2 emits the contents of the P2 Special Function Register
Port 2 also receives the high-order address bits during program verification
Port 3 Port 3 is an 8-bit bidirectional I O port with internal pullups Port 3 pins that
have 1s written to them are pulled high by the internal pullups and in that state can be
used as inputs As inputs Port 3 pins that are externally being pulled low will source
current (IIL on the data sheet) because of the pullups
Port 3 also serves the functions of various special features of the MCS-51 Family as
listed below
Pin Name
Alternate Function
P3 0
P3 1
P3 2
P3 3
P3 4
P3 5
P3 6
P3 7
RXD
TXD
INT0
INT1
T0
T1
WR
RD
Serial input line
Serial output line
External Interrupt 0
External Interrupt 1
Timer 0 external input
Timer 1 external input
External Data Memory Write strobe
External Data Memory Read strobe
5

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83C152JC arduino
EXTERNAL PROGRAM MEMORY READ CYCLE
8XC152JA JB JC JD
EXTERNAL DATA MEMORY READ CYCLE
270431 – 8
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