|
|
PDF WM8569 Data sheet ( Hoja de datos )
| Número de pieza | WM8569 | |
| Descripción | Stereo CODEC | |
| Fabricantes | Wolfson Microelectronics | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de WM8569 (archivo pdf) en la parte inferior de esta página. Total 36 Páginas | ||
|
No Preview Available !
w
WM8569
24-bit, 192kHz Stereo CODEC with Volume Control
DESCRIPTION
FEATURES
The WM8569 is a stereo audio codec ideal for DVD, PVR,
LCD-TV and automotive applications. Independent ADC
and DAC clocking permits separate record and playback
sampling rates.
• Audio Performance
− 103dB SNR (‘A’ weighted @ 48kHz) DAC
− DAC Sampling Frequency: 8kHz – 192kHz
− 100dB SNR (‘A’ weighted @ 48kHz) ADC
A stereo 24-bit multi-bit sigma delta DAC with oversampling
− ADC Sampling Frequency: 32kHz – 96kHz
and digital interpolation filters provides the output signal.
Digital audio input word lengths from 16-24 bits and
sampling rates from 8kHz to 192kHz are supported.
• Independent Sampling Rates for ADC and DAC
• 3-wire SPI Serial or Hardware Control Interface
• Audio Mute and De-Emphasis Functions
A stereo 24-bit multi-bit sigma delta ADC is used. Digital
audio output word lengths from 16-24 bits and sampling
rates from 32kHz to 96kHz are supported. The DAC and
ADC support independent sampling rates.
• Programmable Audio Data Interface Modes
− 16/20/24/32 bit Word Lengths
− I2S, Left, Right Justified or DSP
The audio data interface supports I2S, left justified, right
justified and DSP digital audio formats.
• 2.7V to 5.5V Analogue Supply
• 2.7V to 3.6V Digital Supply
• 28-lead SSOP Package
The device is controlled via a 3-wire serial interface. The
interface provides access to all features including volume
APPLICATIONS
controls, mutes, de-emphasis and power management
facilities. A hardware control interface allows access to a
• DVD Recorder
limited feature set. The WM8569 is available in a 28-lead
• Personal Video Recorder
SSOP.
• PC Sound Card
www.DataShee•t4U.coAmutomotive Audio
• LCD-TV
BLOCK DIAGRAM
WOLFSON MICROELECTRONICS plc
To receive regular email updates, sign up at http://www.wolfsonmicro.com/enews/
Production Data, June 2006, Rev 4.0
Copyright 2006 Wolfson Microelectronics plc
1 page  
Production Data
WM8569
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously operating at
or beyond these limits. Device functional operating limits and guaranteed performance specifications are given under Electrical
Characteristics at the test conditions specified.
ESD Sensitive Device. This device is manufactured on a CMOS process. It is therefore generically susceptible
to damage from excessive static voltages. Proper ESD precautions must be taken during handling and storage
of this device.
Wolfson tests its package types according to IPC/JEDEC J-STD-020B for Moisture Sensitivity to determine acceptable storage
conditions prior to surface mount assembly. These levels are:
MSL1 = unlimited floor life at <30°C / 85% Relative Humidity. Not normally stored in moisture barrier bag.
MSL2 = out of bag storage for 1 year at <30°C / 60% Relative Humidity. Supplied in moisture barrier bag.
MSL3 = out of bag storage for 168 hours at <30°C / 60% Relative Humidity. Supplied in moisture barrier bag.
The Moisture Sensitivity Level for each package type is specified in Ordering Information.
CONDITION
Digital supply voltage
Analogue supply voltage
Voltage range digital inputs 1
Voltage range analogue inputs 1
Master Clock Frequency
Operating temperature range, TA
Storage temperature after soldering
Notes:
1. Analogue and digital grounds must always be within 0.3V of each other.
MIN
-0.3V
-0.3V
DGND -0.3V
AGND -0.3V
-25°C
-65°C
MAX
+5V
+7V
DVDD +0.3V
AVDD +0.3V
37MHz
+85°C
+150°C
w
PD Rev 4.0 June 2006
5
5 Page 
Production Data
WM8569
Test Conditions
AVDD = 5V, DVDD = 3.3V, AGND = 0V, DGND = 0V, TA = +25oC, Slave Mode, fs = 48kHz, DACMCLK and ADCMCLK = 256fs
unless otherwise stated.
PARAMETER
SYMBOL
Audio Data Input Timing Information
ADCBCLK/DACBCLK cycle
time
tBCY
ADCBCLK/DACBCLK pulse
width high
tBCH
ADCBCLK/DACBCLK pulse
width low
tBCL
ADCLRC/DACLRC set-up
time to
ADCBCLK/DACBCLK rising
edge
tLRSU
ADCLRC/DACLRC hold
time from
ADCBCLK/DACBCLK rising
edge
tLRH
DIN set-up time to
DACBCLK rising edge
tDS
DIN hold time from
DACBCLK rising edge
tDH
DOUT propagation delay
from ADCBCLK falling edge
tDD
Table 3 Digital Audio Data Timing – Slave Mode
TEST CONDITIONS
MIN TYP MAX UNIT
50 ns
20 ns
20 ns
10 ns
10 ns
10 ns
10 ns
0 10 ns
w
PD Rev 4.0 June 2006
11
11 Page | ||
| Páginas | Total 36 Páginas | |
| PDF Descargar | [ Datasheet WM8569.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| WM8569 | Stereo CODEC | Wolfson Microelectronics |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |