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PDF CAT25320 Data sheet ( Hoja de datos )

Número de pieza CAT25320
Descripción 32-Kb SPI Serial CMOS EEPROM
Fabricantes Catalyst Semiconductor 
Logotipo Catalyst Semiconductor Logotipo



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No Preview Available ! CAT25320 Hoja de datos, Descripción, Manual

32-Kb SPI Serial CMOS EEPROM
CAT25320
FEATURES
DESCRIPTION
„ 10 MHz SPI compatible
„ 1.8V to 5.5V supply voltage range
„ SPI modes (0,0) & (1,1)
„ 32-byte page write buffer
„ Self-timed write cycle
„ Hardware and software protection
„ Block write protection
– Protect 1/4, 1/2 or entire EEPROM array
„ Low power CMOS technology
„ 1,000,000 program/erase cycles
„ 100 year data retention
„ Industrial temperature range
„ RoHS-compliant 8 lead PDIP, SOIC, TSSOP and
8-pad TDFN packages
The CAT25320 is a 32-Kb Serial CMOS EEPROM
device internally organized as 4096x8 bits. This
features a 32-byte page write buffer and supports the
Serial Peripheral Interface (SPI) protocol. The device
is enabled through a Chip Select (C¯¯S) input. In
addition, the required bus signals are clock input
(SCK), data input (SI) and data output (SO) lines. The
H¯¯O¯L¯D¯ input may be used to pause any serial
communication with the CAT25320 device. The
device features software and hardware write protec–
tion, including partial as well as full array protection.
www.DataSheet4U.com
PIN CONFIGURATION
PDIP (L)
SOIC (V)
TSSOP (Y)
TDFN (VP2)
C¯¯S 1
SO 2
8 VCC
7 H¯¯O¯L¯D¯
¯W¯P¯ 3
6 SCK
VSS 4
5 SI
PIN FUNCTION
Pin Name
C¯¯S
SO
¯W¯P¯
VSS
SI
SCK
H¯¯O¯L¯D¯
VCC
Function
Chip Select
Serial Data Output
Write Protect
Ground
Serial Data Input
Serial Clock
Hold Transmission Input
Power Supply
FUNCTIONAL SYMBOL
VCC
SI
CS
WP
HOLD
SCK
CAT25320
VSS
SO
For Ordering Information details, see page 15.
© 2007 Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
1
Doc. No. 1111 Rev. E

1 page




CAT25320 pdf
CAT25320
STATUS REGISTER
The Status Register, as shown in Table 2, contains a
number of status and control bits.
The ¯R¯D¯Y¯ (Ready) bit indicates whether the device is
busy with a write operation. This bit is automatically
set to 1 during an internal write cycle, and reset to 0
when the device is ready to accept commands. For
the host, this bit is read only.
The WEL (Write Enable Latch) bit is set/reset by the
WREN/WRDI commands. When set to 1, the device is
in a Write Enable state and when set to 0, the device
is in a Write Disable state.
The BP0 and BP1 (Block Protect) bits determine
which blocks are currently write protected. They are
set by the user with the WRSR command and are
non-volatile. The user is allowed to protect a quarter,
one half or the entire memory, by setting these bits
according to Table 3. The protected blocks then
become read-only.
The WPEN (Write Protect Enable) bit acts as an
enable for the ¯W¯P¯ pin. Hardware write protection is
enabled when the ¯W¯P¯ pin is low and the WPEN bit
is 1. This condition prevents writing to the status
register and to the block protected sections of
memory. While hardware write protection is active,
only the non-block protected memory can be written.
Hardware write protection is disabled when the ¯W¯P¯
pin is high or the WPEN bit is 0. The WPEN bit, ¯W¯P¯
pin and WEL bit combine to either permit or inhibit
Write operations, as detailed in Table 4.
Table 2. Status Register
76
WPEN
0
5
0
4 3 2 10
0
BP1
BP0
WEL
¯R¯D¯Y¯
Table 3. Block Protection Bits
Status Register Bits
BP1
BP0
00
01
10
11
Array Address Protected
None
0C00-0FFF
0800-0FFF
0000-0FFF
Protection
No Protection
Quarter Array Protection
Half Array Protection
Full Array Protection
Table 4. Write Protect Conditions
WPEN
0
0
1
1
X
X
¯W¯P¯
X
X
Low
Low
High
High
WEL
0
1
0
1
0
1
Protected
Blocks
Protected
Protected
Protected
Protected
Protected
Protected
Unprotected
Blocks
Protected
Writable
Protected
Writable
Protected
Writable
Status
Register
Protected
Writable
Protected
Protected
Protected
Writable
© 2007 Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
5
Doc. No. 1111 Rev. E

5 Page





CAT25320 arduino
PACKAGE OUTLINES
8-LEAD 300MIL PLASTIC DIP (L)
CAT25320
SYMBOL
MIN
NOM
MAX
A 5.33
A1 0.38
A2 3.18 3.35 3.43
b 0.36 0.46 0.56
b2 1.14 1.52 1.78
c 0.20 0.25 0.36
D 9.53 9.65 9.78
E 7.62 7.87 8.25
e 2.54 BSC
E1 6.22 6.35 6.48
eB 7.87
9.40
L 3.05
3.80
Notes:
(1) All dimensions are in millimeters.
(2) Complies with JEDEC MS-001.
© 2007 Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
For current Tape and Reel information, download the PDF file from:
http://www.catsemi.com/documents/tapeandreel.pdf.
11 Doc. No. 1111 Rev. E

11 Page







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