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PDF CAT24C32 Data sheet ( Hoja de datos )
| Número de pieza | CAT24C32 | |
| Descripción | 32-Kb I2C CMOS Serial EEPROM | |
| Fabricantes | Catalyst Semiconductor | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de CAT24C32 (archivo pdf) en la parte inferior de esta página. Total 18 Páginas | ||
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CAT24C32
32-Kb I2C CMOS Serial EEPROM
FEATURES
■ Supports Standard and Fast I2C Protocol
■ 1.8 V to 5.5 V Supply Voltage Range
■ 32-Byte Page Write Buffer
■ Hardware Write Protection for entire memory
■ Schmitt Triggers and Noise Suppression Filters
on I2C Bus Inputs (SCL and SDA).
■ Low power CMOS technology
■ 1,000,000 program/erase cycles
■ 100 year data retention
■ Industrial temperature range
■ RoHS-compliant 8-pin PDIP, SOIC, TSSOP and
TDFN packages
DEVICE DESCRIPTION
The CAT24C32 is a 32-Kb CMOS Serial EEPROM
devices, internally organized as 128 pages of 32 bytes
each.
It features a 32-byte page write buffer and supports
both the Standard (100 kHz) as well as Fast (400 kHz)
I2C protocol.
External address pins make it possible to address up to
eight CAT24C32 devices on the same bus.
PIN CONFIGURATION
PDIP (L)
SOIC (W)
TSSOP (Y)
TDFN (ZD2, VP2)
A0
A1
A2
VSS
1
2
3
4
8 VCC
7 WP
6 SCL
5 SDA
For the location of Pin 1, please consult the
corresponding package drawing.
PIN FUNCTIONS
A0, A1, A2
SDA
SCL
WP
VCC
VSS
Device Address
Serial Data
Serial Clock
Write Protect
Power Supply
Ground
© 2007 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
For Ordering Information details, see page 15.
www.DataSheet4U.com
FUNCTIONAL SYMBOL
VCC
SCL
A2, A1, A0
WP
CAT24C32
SDA
VSS
* The Green & Gold seal identifies RoHS-compliant packaging, using NiPdAu
pre-plated lead frames.
1 Doc. No. 1101, Rev. G
1 page  
Figure 1. Start/Stop Timing
CAT24C32
SCL
SDA
START
CONDITION
Figure 2. Slave Address Bits
STOP
CONDITION
1 0 1 0 A2 A1 A0 R/W
DEVICE ADDRESS
Figure 3. Acknowledge Timing
SCL FROM
MASTER
BUS RELEASE DELAY (TRANSMITTER)
18
DATA OUTPUT
FROM TRANSMITTER
DATA OUTPUT
FROM RECEIVER
START
ACK DELAY (≤ tAA)
BUS RELEASE DELAY (RECEIVER)
9
ACK SETUP (≥ tSU:DAT)
Figure 4. Bus Timing
tF
SCL
tSU:STA
SDA IN
SDA OUT
tLOW
tHIGH
tLOW
tR
tHD:DAT
tHD:STA
tSU:DAT
tAA tDH
tSU:STO
tBUF
© 2007 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
5
Doc No. 1101, Rev. G
5 Page 
8-LEAD 150 MIL WIDE SOIC (W)
CAT24C32
E1
E
D
A
e
b
A1
SYMBOL
A1
A
b
C
D
E
E1
e
h
L
θ1
MIN
0.10
1.35
0.33
0.19
4.80
5.80
3.80
0.25
0.40
0°
NOM
1.27 BSC
MAX
0.25
1.75
0.51
0.25
5.00
6.20
4.00
0.50
1.27
8°
h x 45
θ1
L
C
24C32_64_8-LEAD_SOIC.eps
For current Tape and Reel information, download the PDF file from:
http://www.catsemi.com/documents/tapeandreel.pdf.
Notes:
1. All dimensions are in millimeters.
2. Complies with JEDEC specification MS-012 dimensions.
© 2007 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
11
Doc No. 1101, Rev. G
11 Page | ||
| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet CAT24C32.PDF ] | |
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