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PDF K4E640412E Data sheet ( Hoja de datos )
| Número de pieza | K4E640412E | |
| Descripción | (K4E640412E / K4E660412E) 16M x 4bit CMOS Dynamic RAM | |
| Fabricantes | Samsung semiconductor | |
| Logotipo |  |
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Industrial Temperature
K4E660412E,K4E640412E
CMOS DRAM
16M x 4bit CMOS Dynamic RAM with Extended Data Out
DESCRIPTION
This is a family of 16,777,216 x 4 bit Extended Data Out Mode CMOS DRAMs. Extended Data Out Mode offers high speed random
access of memory cells within the same row. Refresh cycle(4K Ref. or 8K Ref.), access time (-45, -50 or -60), power consumption(Nor-
mal or Low power) are optional features of this family. All of this family have CAS-before-RAS refresh, RAS-only refresh and Hidden
refresh capabilities. Furthermore, Self-refresh operation is available in L-version. This 16Mx4 EDO Mode DRAM family is fabricated
using Samsung′s advanced CMOS process to realize high band-width, low power consumption and high reliability.
FEATURES
• Part Identification
- K4E660412E-JI/P(3.3V, 8K Ref., SOJ)
- K4E640412E-JI/P(3.3V, 4K Ref., SOJ)
- K4E660412E-TI/P(3.3V, 8K Ref., TSOP)
- K4E640412E-TI/P(3.3V, 4K Ref., TSOP)
• Active Power Dissipation
Speed
-45
-50
-60
8K
324
288
252
Unit : mW
4K
432
396
360
• Refresh Cycles
Part
NO.
K4E660412E*
K4E640412E
Refresh
cycle
8K
4K
Refresh time
Normal L-ver
64ms 128ms
* Access mode & RAS only refresh mode
: 8K cycle/64ms(Normal), 8K cycle/128ms(L-ver.)
CAS -before-RAS & Hidden refresh mode
: 4K cycle/64ms(Normal), 4K cycle/128ms(L-ver.)
• Performance Range
Speed
-45
tRAC
45ns
tCAC
12ns
-50 50ns 13ns
-60 60ns 15ns
tRC
74ns
84ns
104ns
tHPC
17ns
20ns
25ns
• Extended Data Out Mode operation
• CAS-before-RAS refresh capability
• RAS-only and Hidden refresh capability
• Self-refresh capability (L-ver only)
• Fast parallel test mode capability
• LVTTL(3.3V) compatible inputs and outputs
• Early Write or output enable controlled write
• JEDEC Standard pinout
• Available in Plastic SOJ and TSOP(II) packages
• +3.3V±0.3V power supply
• Industrial Temperature operating ( -40~85°C )
FUNCTIONAL BLOCK DIAGRAM
RAS
CAS
W
Control
Clocks
VBB Generator
Vcc
Vss
Refresh Timer
Refresh Control
Refresh Counter
A0~A12
(A0~A11)*1
A0~A10
(A0~A11)*1
Row Address Buffer
Col. Address Buffer
Note) *1 : 4K Refresh
Row Decoder
Memory Array
16,777,216 x 4
Cells
Column Decoder
Data in
Buffer
Data out
Buffer
DQ0
to
DQ3
SAMSUNG ELECTRONICS CO., LTD. reserves the right to
change products and specifications without notice.
1 page  
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Industrial Temperature
K4E660412E,K4E640412E
CAPACITANCE (TA=25°C, VCC=3.3V, f=1MHz)
Parameter
Input capacitance [A0 ~ A12]
Input capacitance [RAS , CAS, W, OE ]
Output capacitance [DQ0 - DQ3]
Symbol
CIN1
CIN2
CDQ
AC CHARACTERISTICS (-40°C≤TA≤85°C, See note 2)
Test condition : VC C=3.3V±0.3V, Vih/Vil=2.2/0.7V, Voh/Vol=2.0/0.8V
Parameter
Symbol
-45
Min Max
Random read or write cycle time
Read-modify-write cycle time
Access time from RAS
Access time from CAS
Access time from column address
CAS to output in Low-Z
Output buffer turn-off delay from CAS
OE to output in Low-Z
Transition time (rise and fall)
RAS precharge time
RAS pulse width
RAS hold time
CAS hold time
CAS pulse width
RAS to CAS delay time
RAS to column address delay time
CAS to RAS precharge time
Row address set-up time
Row address hold time
Column address set-up time
Column address hold time
Column address to RAS lead time
Read command set-up time
Read command hold time referenced to CAS
Read command hold time referenced to RAS
Write command hold time
Write command pulse width
Write command to RAS lead time
Write command to CAS lead time
Data set-up time
tRC
tRWC
tRAC
tCAC
tAA
t CLZ
tCEZ
tOLZ
tT
tR P
tRAS
tRSH
tCSH
tCAS
tRCD
tRAD
tCRP
tASR
tRAH
tASC
tCAH
tRAL
tRCS
tRCH
tRRH
tWCH
tW P
tRWL
tCWL
tD S
74
101
45
12
23
3
3 13
3
1 50
25
45 10K
8
35
7 5K
11 33
9 22
5
0
7
0
7
23
0
0
0
7
6
8
7
0
Min
-
-
-
-50
Min Max
84
113
50
13
25
3
3 13
3
1 50
30
50 10K
8
38
8 10K
11 37
9 25
5
0
7
0
7
25
0
0
0
7
7
8
7
0
CMOS DRAM
Max Units
5 pF
7 pF
7 pF
-60
Min Max
104
138
60
15
30
3
3 13
3
1 50
40
60 10K
10
40
10 10K
14 45
12 30
5
0
10
0
10
30
0
0
0
10
10
10
10
0
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note
3,4,10,12
3,4,5,12
3,10,12
3
6,13
3
2
16
4
10
8
8
9
5 Page 
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Industrial Temperature
K4E660412E,K4E640412E
WRITE CYCLE ( OE CONTROLLED WRITE )
NOTE : DOUT = OPEN
VIH -
RAS
VIL -
VIH -
CAS
VIL -
VIH -
A
VIL -
VIH -
W
VIL -
VIH -
OE
VIL -
DQ0 ~ DQ3(7)
VIH -
VIL -
tRAS
tRC
tCRP
tRCD
tRAD
tASR
tRAH
ROW
ADDRESS
tASC
tCSH
tRSH
tCAS
tR A L
tC A H
COLUMN
ADDRESS
tCWL
tRWL
tWP
tOED
tOEH
tDS
tDH
DATA-IN
CMOS DRAM
tRP
tCRP
Don′t care
Undefined
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| PDF Descargar | [ Datasheet K4E640412E.PDF ] | |
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