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PDF MAC4DSM Data sheet ( Hoja de datos )

Número de pieza MAC4DSM
Descripción Triacs Silicon Bidirectional Thyristors
Fabricantes ON Semiconductor 
Logotipo ON Semiconductor Logotipo



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MAC4DSM, MAC4DSN
Triacs
Preferred Device
Silicon Bidirectional Thyristors
Designed for high volume, low cost, industrial and consumer
applications such as motor control; process control; temperature, light
and speed control.
Features
Small Size Surface Mount DPAK Package
Passivated Die for Reliability and Uniformity
Blocking Voltage to 800 V
On−State Current Rating of 4.0 Amperes RMS at 108°C
Low IGT − 10 mA Maximum in 3 Quadrants
High Immunity to dv/dt − 50 V/ms at 125°C
Epoxy Meets UL 94 V−0 @ 0.125 in
ESD Ratings: Human Body Model, 3B u 8000 V
Machine Model, C u 400 V
Pb−Free Packages are Available
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol Value
Unit
Peak Repetitive Off−State Voltage
(Note 1) (TJ = −40 to 125°C, Sine
Wave, 50 to 60 Hz, Gate Open)
MAC4DSM
MAC4DSN
VDRM,
VRRM
600
800
V
On−State RMS Current
(Full Cycle Sine Wave, 60 Hz,
TC = 108°C)
Peak Non-Repetitive Surge Current
(One Full Cycle Sine Wave, 60 Hz,
TJ = 125°C)
Circuit Fusing Consideration
(t = 8.3 msec)
IT(RMS)
4.0
A
ITSM
40
A
I2t 6.6 A2sec
Peak Gate Power
PGM 0.5 W
(Pulse Width 10 msec, TC = 108°C)
Average Gate Power
(t = 8.3 msec, TC = 108°C)
PG(AV)
0.1
W
Peak Gate Current
IGM 0.2 A
(Pulse Width 10 msec, TC = 108°C)
Peak Gate Voltage
(Pulse Width 10 msec, TC = 108°C)
VGM
5.0
V
Operating Junction Temperature Range
TJ −40 to 125 °C
Storage Temperature Range
Tstg −40 to 150 °C
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. VDRM and VRRM for all types can be applied on a continuous basis. Blocking
voltages shall not be tested with a constant current source such that the
voltage ratings of the device are exceeded.
© Semiconductor Components Industries, LLC, 2005
November, 2005 − Rev. 5
1
http://onsemi.com
TRIACS
4.0 AMPERES RMS
600 − 800 VOLTS
MT2
MT1
G
12
3
4
DPAK
CASE 369C
STYLE 6
MARKING
DIAGRAMS
YWW
AC
4DSxG
4
1
2
3
DPAK−3
CASE 369D
STYLE 6
YWW
AC
4DSxG
Y
WW
AC4DSx
G
= Year
= Work Week
= Device Code
x= M or N
= Pb−Free Package
PIN ASSIGNMENT
1 Main Terminal 1
2 Main Terminal 2
3 Gate
4 Main Terminal 2
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
Preferred devices are recommended choices for future use
and best overall value.
Publication Order Number:
MAC4DSM/D

1 page




MAC4DSM pdf
MAC4DSM, MAC4DSN
14
12
10
MT2 NEGATIVE
8.0
6.0 MT2 POSITIVE
4.0
2.0
0
−50 −25 0 25 50 75 100
TJ, JUNCTION TEMPERATURE (°C)
125
Figure 7. Typical Holding Current versus
Junction Temperature
25
Q2
20
Q1
15
Q3
10
5.0
0
−50 −25 0 25 50 75 100
TJ, JUNCTION TEMPERATURE (°C)
125
Figure 8. Typical Latching Current versus
Junction Temperature
1000
TJ = 125°C
800
600
400 VPK = 400 V
600 V
200
800 V
0
100
1000
RG−MT1, GATE−MT1 RESISTANCE (OHMS)
10 k
Figure 9. Exponential Static dv/dt versus
Gate−MT1 Resistance, MT2(+)
1200
1000 VPK = 400 V
TJ = 125°C
800
600
400 600 V
200
800 V
0
100
1000
RG−MT1, GATE−MT1 RESISTANCE (OHMS)
10 k
Figure 10. Exponential Static dv/dt versus
Gate−MT1 Resistance, MT2(−)
800 2000
600
400
110°C
125°C
200
TJ = 100°C
GATE OPEN
1600
TJ = 100°C
1200
800
125°C
110°C
400
GATE OPEN
0
400
500 600 700
VPK, PEAK VOLTAGE (VOLTS)
800
Figure 11. Exponential Static dv/dt versus
Peak Voltage, MT2(+)
0
400
500 600 700
VPK, PEAK VOLTAGE (VOLTS)
800
Figure 12. Exponential Static dv/dt versus
Peak Voltage, MT2(−)
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