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PDF MAC4DCM Data sheet ( Hoja de datos )

Número de pieza MAC4DCM
Descripción Triacs Silicon Bidirectional Thyristors
Fabricantes ON Semiconductor 
Logotipo ON Semiconductor Logotipo



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MAC4DCM, MAC4DCN
Preferred Device
Triacs
Silicon Bidirectional Thyristors
Designed for high volume, low cost, industrial and consumer
applications such as motor control; process control; temperature, light
and speed control.
Features
Small Size Surface Mount DPAK Package
Passivated Die for Reliability and Uniformity
Blocking Voltage to 800 V
On−State Current Rating of 4.0 A RMS at 108°C
High Immunity to dv/dt − 500 V/ms at 125°C
High Immunity to di/dt − 6.0 A/ms at 125°C
Epoxy Meets UL 94 V−0 @ 0.125 in
ESD Ratings: Human Body Model, 3B u 8000 V
Machine Model, C u 400 V
Pb−Free Packages are Available
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol Value
Unit
Peak Repetitive Off−State Voltage
(Note 1) (TJ = −40 to 125°C, Sine Wave,
50 to 60 Hz, Gate Open)
MAC4DCM
MAC4DCN
VDRM,
VRRM
600
800
V
On−State RMS Current
(Full Cycle Sine Wave, 60 Hz,
TC = 108°C)
Peak Non-Repetitive Surge Current
(One Full Cycle Sine Wave, 60 Hz,
TJ = 125°C)
Circuit Fusing Consideration
(t = 8.3 msec)
IT(RMS)
4.0
A
ITSM
I2t
40 A
6.6 A2sec
Peak Gate Power
PGM 0.5 W
(Pulse Width 10 msec, TC = 108°C)
Average Gate Power
(t = 8.3 msec, TC = 108°C)
PG(AV)
0.1
W
Peak Gate Current
IGM 0.5 A
(Pulse Width 10 msec, TC = 108°C)
Peak Gate Voltage
VGM 5.0 V
(Pulse Width 10 msec, TC = 108°C)
Operating Junction Temperature Range
TJ −40 to 125 °C
Storage Temperature Range
Tstg −40 to 150 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. VDRM and VRRM for all types can be applied on a continuous basis. Blocking
voltages shall not be tested with a constant current source such that the
voltage ratings of the device are exceeded.
http://onsemi.com
TRIACS
4.0 AMPERES RMS
600 − 800 VOLTS
MT2
MT1
G
12
3
4
DPAK
CASE 369C
STYLE 6
MARKING
DIAGRAMS
YWW
AC
4DCxG
4
1
2
3
DPAK−3
CASE 369D
STYLE 6
YWW
AC
4DCxG
Y
WW
AC4DCx
G
= Year
= Work Week
= Device Code
x= M or N
= Pb−Free Package
PIN ASSIGNMENT
1 Main Terminal 1
2 Main Terminal 2
3 Gate
4 Main Terminal 2
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
Preferred devices are recommended choices for future use
and best overall value.
© Semiconductor Components Industries, LLC, 2006
May, 2006 − Rev. 6
1
Publication Order Number:
MAC4DCM/D

1 page




MAC4DCM pdf
MAC4DCM, MAC4DCN
60
50
40 MT2 POSITIVE
30
20
MT2 NEGATIVE
10
0
−50 −25 0 25 50 75 100
TJ, JUNCTION TEMPERATURE (°C)
125
Figure 7. Typical Holding Current versus
Junction Temperature
120
100
Q2
80
60
Q1
40
Q3
20
0
−50 −25 0 25 50 75 100
TJ, JUNCTION TEMPERATURE (°C)
125
Figure 8. Typical Latching Current versus
Junction Temperature
10 K
8.0 K
6.0 K
4.0 K
800 V
600 V
VPK = 400 V
2.0 K
TJ = 125°C
15 K
VPK = 400 V
10 K
600 V
800 V
5.0 K
TJ = 125°C
0
100
1000
RG−MT1, GATE−MT1 RESISTANCE (OHMS)
10 K
Figure 9. Exponential Static dv/dt versus
Gate−MT1 Resistance, MT2(+)
0
100
1000
RG−MT1, GATE−MT1 RESISTANCE (OHMS)
10 K
Figure 10. Exponential Static dv/dt versus
Gate−MT1 Resistance, MT2(−)
10 K 14 K
8.0 K
TJ = 100°C
GATE OPEN
6.0 K
110°C
4.0 K
125°C
2.0 K
0
400
500 600 700
VPK, PEAK VOLTAGE (VOLTS)
800
Figure 11. Exponential Static dv/dt versus
Peak Voltage, MT2(+)
12 K
10 K TJ = 100°C
GATE OPEN
8.0 K
110°C
6.0 K
4.0 K 125°C
2.0 K
0
400
500 600 700
VPK, PEAK VOLTAGE (VOLTS)
800
Figure 12. Exponential Static dv/dt versus
Peak Voltage, MT2(−)
http://onsemi.com
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