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PDF M45PE16 Data sheet ( Hoja de datos )
| Número de pieza | M45PE16 | |
| Descripción | Page-Erasable Serial Flash Memory | |
| Fabricantes | ST Microelectronics | |
| Logotipo |  |
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M45PE16
16 Mbit, low-voltage, Page-Erasable Serial Flash memory
with byte alterability and a 50 MHz SPI bus interface
Preliminary Data
Features
■ SPI bus compatible serial interface
■ 50 MHz clock rate (maximum)
■ 16 Mbit of Page-Erasable Flash memory
■ Page of 256 Bytes
– Page Write in 11 ms (typical)
– Page Program in 0.8 ms (typical)
– Page Erase in 10 ms (typical)
■ Sector Erase (512 Kbit)
■ Hardware Write protection of the bottom sector
(64 KBytes)
■ Electronic Signature
– JEDEC Standard two-Byte signature
(4015h)
■ 2.7 to 3.6 V single supply voltage
■ Deep Power-down mode 1 µA (typical)
■ More than 100 000 Write cycles
■ More than 20 years’ data retention
■ Packages
– ECOPACK® (RoHS compliant)
VFQFPN8 (MP)
6 × 5 mm
SO8W (MW)
208 mils body width
February 2007
Rev 5
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to
change without notice.
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1 page  
M45PE16
List of figures
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
MLP and SO8 connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Bus master and memory devices on the SPI bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
SPI modes supported . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Write Enable (WREN) Instruction Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Write Disable (WRDI) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Read Identification (RDID) instruction sequence and data-out sequence . . . . . . . . . . . . . 20
Read Status Register (RDSR) instruction sequence and data-out sequence . . . . . . . . . . 21
Read Data Bytes (READ) instruction sequence and data-out sequence . . . . . . . . . . . . . . 22
Read Data Bytes at Higher Speed (FAST_READ) instruction sequence
and data-out sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Page Write (PW) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Page Program (PP) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Page Erase (PE) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Sector Erase (SE) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Deep Power-down (DP) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Release from Deep Power-down (RDP) instruction sequence . . . . . . . . . . . . . . . . . . . . . . 31
Power-up timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
AC test measurement I/O waveform. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Serial input timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Write Protect setup and hold timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Output timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Reset AC waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
VFQFPN8 (MLP8) 8-lead Very thin Fine Pitch Quad Flat Package No lead,
6 × 5mm, package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
SO8W - 8 lead Plastic Small Outline, 208 mils body width, package outline . . . . . . . . . . . 42
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5 Page 
M45PE16
SPI modes
The typical value of R is 100 kΩ, assuming that the time constant R*Cp (Cp = parasitic
capacitance of the bus line) is short enough, as the S and C lines must reach the correct
state (S = High and C = Low) while the SPI bus is in high impedance.
Example: Cp = 50 pF, that is R*Cp = 5 µs <=> the application must ensure that the Bus
Master never leaves the SPI bus in the high impedance state for a time period shorter than
5 µs.
Figure 4. SPI modes supported
CPOL CPHA
0 0C
1 1C
D MSB
Q MSB
AI01438B
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