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PDF M45PE10 Data sheet ( Hoja de datos )
| Número de pieza | M45PE10 | |
| Descripción | Page-Erasable Serial Flash Memory | |
| Fabricantes | ST Microelectronics | |
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M45PE10
1 Mbit, Low Voltage, Page-Erasable Serial Flash Memory
With Byte-Alterability and a 33 MHz SPI Bus Interface
FEATURES SUMMARY
■ 1Mbit of Page-Erasable Flash Memory
■ Page Write (up to 256 Bytes) in 11ms (typical)
■ Page Program (up to 256 Bytes) in 1.2ms
(typical)
■ Page Erase (256 Bytes) in 10ms (typical)
■ Sector Erase (512 Kbit)
■ 2.7 to 3.6V Single Supply Voltage
■ SPI Bus Compatible Serial Interface
■ 33MHz Clock Rate (maximum)
■ Deep Power-down Mode 1µA (typical)
■ Electronic Signature
– JEDEC Standard Two-Byte Signature
(4011h)
■ More than 100,000 Write Cycles
■ More than 20 Year Data Retention
■ Packages
– ECOPACK® (RoHS compliant)
Figure 1. Packages
8
1
SO8 (MN)
150 mil width
VDFPN8 (MP)
(MLP8)
October 2005
1/34
1 page  
M45PE10
SIGNAL DESCRIPTION
Serial Data Output (Q). This output signal is
used to transfer data serially out of the device.
Data is shifted out on the falling edge of Serial
Clock (C).
Serial Data Input (D). This input signal is used to
transfer data serially into the device. It receives in-
structions, addresses, and the data to be pro-
grammed. Values are latched on the rising edge of
Serial Clock (C).
Serial Clock (C). This input signal provides the
timing of the serial interface. Instructions, address-
es, or data present at Serial Data Input (D) are
latched on the rising edge of Serial Clock (C). Data
on Serial Data Output (Q) changes after the falling
edge of Serial Clock (C).
Chip Select (S). When this input signal is High,
the device is deselected and Serial Data Output
(Q) is at high impedance. Unless an internal Read,
Program, Erase or Write cycle is in progress, the
device will be in the Standby Power mode (this is
not the Deep Power-down mode). Driving Chip
Select (S) Low selects the device, placing it in the
Active Power mode.
After Power-up, a falling edge on Chip Select (S)
is required prior to the start of any instruction.
Reset (Reset). The Reset (Reset) input provides
a hardware reset for the memory. In this mode, the
outputs are high impedance.
When Reset (Reset) is driven High, the memory is
in the normal operating mode. When Reset (Re-
set) is driven Low, the memory will enter the Reset
mode, provided that no internal operation is cur-
rently in progress. Driving Reset (Reset) Low while
an internal operation is in progress has no effect
on that internal operation (a write cycle, program
cycle, or erase cycle).
Write Protect (W). This input signal puts the de-
vice in the Hardware Protected mode, when Write
Protect (W) is connected to VSS, causing the first
256 pages of memory to become read-only by pro-
tecting them from write, program and erase oper-
ations. When Write Protect (W) is connected to
VCC, the first 256 pages of memory behave like
the other pages of memory.
5/34
5 Page 
M45PE10
Write Enable (WREN)
The Write Enable (WREN) instruction (Figure 7.)
sets the Write Enable Latch (WEL) bit.
The Write Enable Latch (WEL) bit must be set pri-
or to every Page Write (PW), Page Program (PP),
Page Erase (PE), and Sector Erase (SE) instruc-
tion.
The Write Enable (WREN) instruction is entered
by driving Chip Select (S) Low, sending the in-
struction code, and then driving Chip Select (S)
High.
Figure 7. Write Enable (WREN) Instruction Sequence
S
01234567
C
Instruction
D
High Impedance
Q
AI02281E
Write Disable (WRDI)
The Write Disable (WRDI) instruction (Figure 8.)
resets the Write Enable Latch (WEL) bit.
The Write Disable (WRDI) instruction is entered by
driving Chip Select (S) Low, sending the instruc-
tion code, and then driving Chip Select (S) High.
The Write Enable Latch (WEL) bit is reset under
the following conditions:
– Power-up
– Write Disable (WRDI) instruction completion
– Page Write (PW) instruction completion
– Page Program (PP) instruction completion
– Page Erase (PE) instruction completion
– Sector Erase (SE) instruction completion
Figure 8. Write Disable (WRDI) Instruction Sequence
S
01234567
C
Instruction
D
High Impedance
Q
AI03750D
11/34
11 Page | ||
| Páginas | Total 34 Páginas | |
| PDF Descargar | [ Datasheet M45PE10.PDF ] | |
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