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PDF W83195BR-118 Data sheet ( Hoja de datos )

Número de pieza W83195BR-118
Descripción Clock Generator
Fabricantes Winbond 
Logotipo Winbond Logotipo



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Winbond Clock Generator
W83195BR-118/W83195BG-118
For Intel 915/945 Chipsets
Date: May/02/2006 Revision: 0.81

1 page




W83195BR-118 pdf
W83195BR-118/W83195BG-118
STEPLESS FOR INTEL 915/945 CHIPSETS
1. GENERAL DESCRIPTION
The W83195BR-118 is a Clock Synthesizer for Intel P4 processors and Intel Grandsdale chipsets.
W83195BR-118 provides all clocks required for high-speed microprocessor and provides step-less
frequency programming, 32 different frequencies of CPU, PCI, PCI-Express clocks setting.
Simultaneously W83195BR-118 supports SRC 100MHz for SATA and DOT 96MHz clock outputs for
integrated graphic chipsets. All clocks are externally selectable with smooth transitions.
The W83195BR-118 programs the registers to enable or disable each clock outputs through I2C serial
bus interface and provides -0.5% down type spread spectrum or programmable spread spectrum
scale to reduce EMI.
The W83195BR-118 also has watchdog timer and reset output pin to support auto-reset when
systems hanging caused by improper frequency setting.
The W83195BR-118 is driven with a 14.318 MHz reference crystal and runs on a 3.3V supply.
2. PRODUCT FEATURES
2 pair 0.7 V current mode Differential clock outputs for CPU
1 pair 0.7V current mode Differential 100 MHz clock outputs for SRC.
1 pair 0.7V current mode Differential 96MHz clock outputs for DOT.
5 pair 0.7V current mode Differential clock outputs for PCI-Express
6 PCI clock outputs for PCI
3 PCI clock free running outputs for PCI
1 24_48Mhz clock output for super I/O.
1 48 MHz clock output for USB.
2 14.318MHz REF clock outputs.
Step-less frequency programming
I2C 2-Wire serial interface and support byte read/write and block read/write.
-0.5% down type spread spectrum in H/W and software select mode
Programmable spread spectrum scale to reduce EMI in M/N mode
Programmable registers to enable/stop each output.
Programmable clock outputs to control slew rate and skew.
Watch Dog Timer and RESET# output pins
56 pin SSOP package
Publication Release Date: May 2006
- 1 - Revision 0.81

5 Page





W83195BR-118 arduino
W83195BR-118/W83195BG-118
STEPLESS FOR INTEL 915/945 CHIPSETS
6. FREQUENCY SELECTION BY HARDWARE OR SOFTWARE
This frequency table is used at power on latched FS [2:0] value or software programming at SSEL
[4:0] (Register 0 bit 7 ~ 3).
FS4 FS3 FS2 FS1 FS0 CPU (MHZ) PCIE (MHZ)
SRC (MHZ)
PCI (MHZ)
00000
00001
00010
00011
00100
00101
00110
00111
01000
01001
01010
01011
01100
01101
01110
01111
10000
10001
10010
10011
10100
10101
10110
10111
11000
11001
11010
11011
11100
11101
11110
11111
266.66
133.33
200.00
166.66
333.33
100.00
400.00
200.00
266.66
133.33
200.00
166.66
333.33
100.00
400.00
200.00
269.33
134.66
202.00
168.33
274.66
137.33
206.00
171.66
279.99
140.00
210.00
174.99
287.99
144.00
216.00
179.99
100.00
100.00
100.00
111.11
111.11
100.00
100.00
100.00
133.33
133.33
133.33
111.11
111.11
133.33
133.33
100.00
101.00
101.00
101.00
112.22
103.00
103.00
103.00
114.44
105.00
105.00
105.00
116.66
108.00
108.00
108.00
120.00
100.00
100.00
100.00
100.00
100.00
100.00
100.00
100.00
100.00
100.00
100.00
100.00
100.00
100.00
100.00
100.00
100.00
100.00
100.00
100.00
100.00
100.00
100.00
100.00
100.00
100.00
100.00
100.00
100.00
100.00
100.00
100.00
33.33
33.33
33.33
33.33
33.33
33.33
33.33
33.33
33.33
33.33
33.33
33.33
33.33
33.33
33.33
33.33
33.67
33.67
33.67
33.67
34.33
34.33
34.33
34.33
35.00
35.00
35.00
35.00
36.00
36.00
36.00
36.00
Publication Release Date: May 2006
- 7 - Revision 0.81

11 Page







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