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PDF VSC6250 Data sheet ( Hoja de datos )

Número de pieza VSC6250
Descripción 1Gb/s 16-Channel Drive-Side Deskew IC
Fabricantes Vitesse Semiconductor 
Logotipo Vitesse Semiconductor Logotipo



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No Preview Available ! VSC6250 Hoja de datos, Descripción, Manual

Data Sheet
VSC6250
www.DataSheet4U.com
VITESSE
SEMICONDUCTOR CORPORATION
1Gb/s 16-Channel
Drive-Side Deskew IC
Features
• High-Speed Operation:
1 Gb/s Data Rate
500ps min Output Pulse Width
750ps min Input Pulse Width
• Excellent Overall Timing Accuracy:
Ultra-Stable Timing Delays
Minimum Pattern Dependence
Very Fine Timing Resolution (1 LSB = 8ps)
• High Level of Integration Reduces Board Area:
16 Independently Adjustable Delay Lines in a
Single Package
• Configurable as 2 1:8 or 1:16
• Wide Span: > 4ns Usable Range
• Pulse Width Adjustment to Compensate for
Dispersion in Pin Electronics:
± 2ns Independent Adjustment of Rising and
Falling Edges
• Fully Digital Single-Chip Solution:
No Off-Chip DACs Required
No DAC-Induced Timing Errors from Analog
Crosstalk, Reference Noise, Temperature, or
Voltage Drift
• Single Power Supply: -2V @ 5W
• 128-Pin PQFP, 14x20mm Thermally-
Enhanced Package
Applications
• Drive-Side Deskew in High-Speed Memory
Testers
• Direct RAMBUS DRAM, SLDRAM, DDR
SDRAM, Fast SSRAM
• High-Speed Instrumentation: Pulse Generators,
Timing Margin Testers for Datalink, Interface,
and Disk Drive Applications
• Telecom, Datacom, and Computer Deskew
General Description
The VSC6250 is intended for use in the next generation of high-speed, high-accuracy memory testers for
devices such as Direct RAMBUS DRAM, SLDRAM, DDR SDRAM, and fast SSRAM.
The VSC6250 provides ultra-precise timing to allow next generation memory testers to achieve excellent
overall timing accuracy. Timing delays of the VSC6250 are extremely stable with respect to temperature and
voltage. Proprietary circuit design and process technology reduce pattern, data, frequency, and duty-cycle
dependencies to an absolute minimum. The VSC6250 requires no external DACs, which eliminates errors due
to DAC reference noise and analog crosstalk, and DAC temperature and voltage drift. The VSC6250 is avail-
able in a 128-pin PQFP, 14x20mm thermally-enhanced package.
G52197-0, Rev. 4.0
© VITESSE SEMICONDUCTOR CORPORATION
8/19/00
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
Page 1

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VSC6250 pdf
Data Sheet
VSC6250
VITESSE
SEMICONDUCTOR CORPORATION
1Gb/s 16-Channel
Drive-Side Deskew IC
The 32 delays (rising and falling edges for 16 channels) in the VSC6250 are programmed using a parallel
interface. Verniers are selected by a 5-bit address word and controlled by two function enable bits. Each vernier
requires 11 bits to set the delay value.
Power dissipation of the VSC6250 is less than 5W from a single -2V supply.
Table 1: Operational Mode Truth Table
Mode #
1
2
Mode Name
Cal Mode
User Mode
CALENN
0
1
Mode Description
Sets timing delays with each vernier selected with ADR [3:0] Serial Data
Input.
Generates timing delays as set by data in Cal Mode.
ADR[4:0]
Figure 4: CAL Mode Timing Diagram
CALENN
D[10:0]
MSB
Don’t Care
10 9
LSB
Load Calibration Register Latch Data into Data Latch
Data Latch Transparent
Measure Delay
1 CAL Cycle
G52197-0, Rev. 4.0
© VITESSE SEMICONDUCTOR CORPORATION
8/19/00
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
Page 5

5 Page





VSC6250 arduino
Data Sheet
VSC6250
VITESSE
SEMICONDUCTOR CORPORATION
1Gb/s 16-Channel
Drive-Side Deskew IC
Table 6: Pin Identifications
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
Signal Name
VTT
VDD
DOUT7
DOUT7N
VDD
DOUT6
DOUT6N
VTT
DOUT5
DOUT5N
VDD
DOUT4
DOUT4N
VDD
RCK
RCKN
VDD
VTT
VTT
VTT
DOUT3
DOUT3N
VDD
DOUT2
DOUT2N
VDD
DOUT1
DOUT1N
VDD
DOUT0
DOUT0N
VTT
VTT
VTT
VDD
ADR4
ADR3
Signal Type
O
O
O
O
O
O
O
O
I
I
O
O
O
O
O
O
O
O
I
I
Levels
-2.0V
0V
ECL
ECL
0V
ECL
ECL
-2.0V
ECL
ECL
0V
ECL
ECL
0V
ECL
ECL
0V
-2.0V
-2.0V
-2.0V
ECL
ECL
0V
ECL
ECL
0V
ECL
ECL
0V
ECL
ECL
-2.0V
-2.0V
-2.0V
0V
ECL
ECL
Description
Power Supply
Ground
Output Channel 7, True
Output Channel 7, Complementary
Ground
Output Channel 6, True
Output Channel 6, Complementary
Power Supply
Output Channel 5, True
Output Channel 5, Complementary
Power Supply
Output Channel 4, True
Output Channel 4, Complementary
Ground
250 MHz Reference Clock, True
250 MHz Reference Clock, Complementary
Ground
Power Supply
Power Supply
Power Supply
Output Channel 3, True
Output Channel 3, Complementary
Ground
Output Channel 2, True
Output Channel 2, Complementary
Ground
Output Channel 1, True
Output Channel 1, Complementary
Ground
Output Channel 0, True
Output Channel 0, Complementary
Power Supply
Power Supply
Power Supply
Ground
Address Bit 4 for Vernier Selection
Address Bit 3 for Vernier Selection
G52197-0, Rev. 4.0
© VITESSE SEMICONDUCTOR CORPORATION
8/19/00
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
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