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PDF FCH47N60 Data sheet ( Hoja de datos )

Número de pieza FCH47N60
Descripción N-Channel MOSFET
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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FCH47N60
N-Channel SuperFET® MOSFET
600 V, 47 A, 70 mΩ
Features
• 650 V @ TJ = 150°C
• Typ. RDS(on) = 58 mΩ
• Ultra Low Gate Charge (Typ. Qg = 210 nC)
• Low Effective Output Capacitance (Typ. Coss(eff.) = 420 pF)
• 100% Avalanche Tested
• RoHS Compliant
Applications
• Solar Inverter
• AC-DC Power Supply
December 2013
Description
SuperFET® MOSFET is Fairchild Semiconductor’s first genera-
tion of high voltage super-junction (SJ) MOSFET family that is
utilizing charge balance technology for outstanding low on-
resistance and lower gate charge performance. This technology
is tailored to minimize conduction loss, provide superior switch-
ing performance, dv/dt rate and higher avalanche energy. Con-
sequently, SuperFET MOSFET is very suitable for the switching
power applications such as PFC, server/telecom power, FPD
TV power, ATX power and industrial power applications.
D
G
D
S
TO-247
G
MOSFET Maximum Ratings TC = 25°C unless otherwise noted.
Symbol
VDSS
ID
IDM
VGSS
EAS
IAR
EAR
dv/dt
Parameter
Drain to Source Voltage
Drain Current
Drain Current
Continuous (TC = 25°C)
Continuous (TC = 100°C)
Pulsed
Gate to Source Voltage
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
PD Power Dissipation
(TC = 25°C)
Derate Above 25°C
TJ, TSTG
TL
Operating and Storage Temperature Range
Maximum Lead Temperature for Soldering,
1/8” from Case for 5 Seconds
Thermal Characteristics
Symbol
RθJC
RθJA
RθJA
Parameter
Thermal Resistance, Junction to Case, Max.
Thermal Resistance, Case-to-Sink, Typ.
Thermal Resistance, Junction to Ambient, Max.
S
(Note 1)
(Note 2)
(Note 1)
(Note 1)
(Note 3)
FCH47N60_F133
600
47
29.7
141
±30
1800
47
41.7
4.5
417
3.33
-55 to +150
300
FCH47N60_F133
0.3
0.24
41.7
Unit
V
A
A
V
mJ
A
mJ
V/ns
W
W/°C
°C
°C
Unit
°C/W
°C/W
°C/W
©2009 Fairchild Semiconductor Corporation
FCH47N60 Rev. C2
1
www.fairchildsemi.com

1 page




FCH47N60 pdf
IG = const.
Figure 13. Gate Charge Test Circuit & Waveform
V10GVS
VDS
VGS
RG
RL
VDD
VDS
90%
DUT
VGS 10%
td(on)
tr
t on
Figure 14. Resistive Switching Test Circuit & Waveforms
td(off)
tf
t off
V1G0GVSS
tp
VDS
ID
RG
L
EAS = --21-- L IAS2
------B--V--D--S-S-------
BVDSS - VDD
BVDSS
IAS
VDD ID (t)
DUT
VDD
VDS (t)
t p Time
Figure 15. Unclamped Inductive Switching Test Circuit & Waveforms
©2009 Fairchild Semiconductor Corporation
FCH47N60 Rev. C2
5
www.fairchildsemi.com

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