|
|
PDF TC9495F Data sheet ( Hoja de datos )
| Número de pieza | TC9495F | |
| Descripción | Digital Servo Single Chip Processor Built in 1 Bit DA Converter | |
| Fabricantes | Toshiba Semiconductor | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de TC9495F (archivo pdf) en la parte inferior de esta página. Total 17 Páginas | ||
|
No Preview Available !
www.DataSheet4U.com
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC9495F
Digital Servo Single Chip Processor Built in 1 Bit DA Converter
TC9495F
The TC9495F is a single chip processor which incorporates the
following function: synchronous separation protection and
interpolation, EFM demodulation, Error correction, micro
controller interface, digital equalizer for use in servo LSI and
servo control circuit.
In addition, the TC9495F incorporates a 1 bit DA converter. In
combination with the head amplifier TA2109F, TA2150FN,
TA2153FN for digital servo, the TC9495F allow simplified,
adjustment-free structuring of CD player system.
Features
· Capable of decode the text data.
Weight: 1.6 g (typ.)
· Sync pattern detection, sync signal protection and synchronization can be made correctly.
· Built in EFM demodulation circuit, subcode demodulation circuit.
· Capable of correcting dual C1 correction and quadruple C2 correction using the CIRC correction theoretical
format.
· The TC9495F respond to variable playback system.
· Jitter absorbing capacity of ±6 frames.
· Built in 16 KB RAM.
· Built in digital out circuit.
· Built in L/R independent digital attenuator.
· Audio output responds to bilingual function.
· Reed timing free subcode Q data and capable of synchronous output with audio data.
· Built in data slicer and analog PLL (free-adjustment VCO).
· Capable of automatic adjustment function of focus servo and tracking servo, for loop gain, offset and balance.
· Built in RF gain automatic adjustment circuit.
· Built in digital equalizer for phase compensation.
· Built in RAM for digital equalizer for coefficient, and capable of variable pickup.
· Built in focus, tracking servo control circuit.
· Search control corresponds to every mode and can realize high speed and stable search.
· Lens-kick and feed-kick are using speed controlled form.
· Built in AFC circuit and APC circuit for CLV servo of disc motor.
· Built in anti-defect and anti-shock circuit.
· Built in 8 times over sampling digital filter and 1 bit DA converter.
· Built in analog filter for 1 bit DA converter.
· Output format for audio out can be selected 32 fs, 48 fs, or 64 fs modes.
· Built in zero data detect output circuit.
· The TC9495F capable of 4 times speed operation.
· Built in micro controller interface circuit.
· CMOS silicon structure and high speed, low power consumption.
· 100 pin flat package.
1 2002-01-11
1 page  
TC9495F
Pin No.
Symbol
55 DMO
56 2VREF
57 SEL
58 FLGA
59 FLGB
60 FLGC
61 FLGD
62 VDD
63 VSS
64 IO0
65 IO1
66 IO2
67 IO3
68 DMOUT
69 CKSE
70 DACT
71 TESIN
72 TESIO1
73 VSS
74 PXI
75 PXO
76 VDD
77 XVSS
78 XI
79 XO
80 XVDD
81 DVSR
82 RO
83 DVDD
84 DVR
85 LO
86 DVSL
87 TEST1
I/O Functional Description
Disk equalizer output terminal.
O
(PWM carrier = 88.2 kHz for DSP, Synchronize to PXO)
¾ Analog double reference voltage supply terminal.
APC circuit ON/OFF indication signal output terminal.
O At the laser on time, UHF = L at “HiZ” level and UHF = H at
“H” level.
Extemal flag output terminal for internal signal.
O Can select signal from TEZC, FOON , FOK and RFZC by
command.
Extemal flag output terminal for internal signal.
O Can select signal from DFCT , FOON , FMON and RFZC
by command.
Extemal flag output terminal for internal signal.
O Can select signal from TRON , TRSR , FOK and SRCH
by command.
Extemal flag output terminal for internal signal.
O Can select signal from TRON , DMON , HYS and SHC
by command.
¾ Digital power supply voltage terminal.
¾ Digital GND terminal.
Remarks
¾
¾
¾
¾
¾
¾
¾
¾
¾
General I/O terminal. Can change over input port or output
I/O
port by command. At the input mode time can readout a
state of terminal (H/L) by read command. At the output mode
time can control a state of terminal (H/L/HiZ) by command.
¾
This terminal controls IO0~IO3 terminal.
I At “L” level time, IO0, 1 out feed equalizer signal of 2-state With pull-up resistor.
PWM, IO2, 3 out disk equalizer signal of 2-state PWM.
I Normally, keep at open.
With pull-up resistor.
I DAC test mode terminal. Normally, keep at open.
With pull-up resistor.
I Test input terminal. Normally, keep at “L” level.
Analog input.
I Test input/output terminal. Normally, keep at “L” level.
¾
¾ Digital GND terminal.
¾
Crystal oscillator connecting input terminal for DSP.
I
Normally, keep at “L” level.
Analog input.
O Crystal oscillator connecting output terminal for DSP.
¾ Digital power supply voltage terminal.
¾
¾ Oscillator GND terminal for system clock.
¾
I Crystal oscillator connecting input terminal for system clock.
¾
O Crystal oscillator connecting output terminal for system clock.
¾
¾ Oscillator power supply voltage terminal for system clock.
¾
¾ Analog GND terminal for DA converter. (R-ch)
¾
O R channel data forward output terminal.
¾
¾ Analog supply voltage terminal for DA converter.
¾
¾ Reference voltage terminal for DA converter.
¾
O L channel data forward output terminal.
¾
¾ Analog GND terminal for DA converter. (L-ch)
¾
I Test mode terminal. Normal, keep at open.
With pull-up resistor.
5 2002-01-11
5 Page 
4. DATA, CLCK Input/Output Timing
(1) CLCK input mode
Characteristics
Symbol
Test
Circuit
Test Condition
Clock pulse width
“H” Level
“L” Level
tHW
tLW
Input set-up time
Transfer time (1)
“L” Level
tSu
tpHL1
¾ CLCK input mode
Transfer time (2)
“H” Level
“L” Level
tpLH2
tpHL2
SFSY/COFS
CLCK
tpHL1
tSU
tpHL2
tpLH2
tHW tLW
TC9495F
Min Typ. Max Unit
200 ¾
¾
200 ¾
¾
200 ¾
¾
ns
¾¾
5
¾ ¾ 20
¾ ¾ 20
DATA
SUBP
SUBQ
(2) CLCK output mode (tHW, tLW, tpLH3; 2 times speed = 1/2, 4 times speed = 1/4)
Characteristics
Symbol
Test
Circuit
Test Condition
Min
Clock pulse width
“H” Level
“L” Level
tHW
tLW
¾
¾
Transfer time (1)
Transfer time (2)
“L” Level
“H” Level
“L” Level
tpHL1
tpLH2
tpHL2
¾ CLCK output mode
¾
¾
¾
Transfer time (3)
“H” Level
tpLH3
¾
Typ.
¾
¾
¾
¾
¾
¾
Max
1000
1000
5
20
20
900
Unit
ns
SFSY/COFS
tpHL1
tpLH3
tpHL2
tpLH2
tHW tLW
CLCK
DATA
SUBP
SUBQ
11 2002-01-11
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet TC9495F.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| TC9495F | Digital Servo Single Chip Processor Built in 1 Bit DA Converter | Toshiba Semiconductor |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |