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PDF L6732 Data sheet ( Hoja de datos )
| Número de pieza | L6732 | |
| Descripción | Adjustable step-down controller | |
| Fabricantes | ST Microelectronics | |
| Logotipo |  |
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L6732
Adjustable step-down controller with synchronous rectification
Features
■ Input voltage range from 1.8V to 14V
■ Supply voltage range from 4.5V to 14V
■ Adjustable output voltage down to 0.6V with
±0.8% accuracy over line voltage and
temperature (0°C~125°C)
■ Fixed frequency voltage mode control
■ TON lower than 100ns
■ 0% to 100% duty cycle
■ External input voltage reference
■ Soft-start and inhibit
■ High current embedded drivers
■ Predictive anti-cross conduction control
■ Programmable high-side and low-side RDS(on)
sense over-current-protection
■ Selectable switching frequency 250KHz/
500KHz
■ Pre-bias start up capability
■ Power good output
■ Master/slave synchronization with 180° phase
shift
■ Over voltage protection
■ Thermal shut-down
■ Package: HTSSOP16
HTSSOP16 (Exposed Pad)
Applications
■ LCD & PDP TV
■ High performance / high density DC-DC
modules
■ Low voltage distributed DC-DC
■ niPOL converters
■ DDR memory supply
■ Graphic cards
Order Codes
Part number
L6732
L6732TR
June 2006
Package
HTSSOP16
HTSSOP16
Rev 4
Packing
Tube
Tape & Reel
1/33
www.st.com
33
1 page  
L6732
1.1 Functional description
Figure 1. Block Diagram
Vcc=4.5V-14V
OCL
OCH
VCCDR
LDO
SS Monitor
Protection and Ref
EAREF
PGOOD
SYNCH
OSC
-
+ 0.6V
-
L6732
-
+
PWM
E/A
+-
BOOT
HGATE
PHASE
LGATE
PGND
GND
FB COMP
Summary description
Vin=1.8V-14V
VOUT
5/33
5 Page 
L6732
5 Device description
Device description
5.1 Oscillator
The switching frequency can be fixed to two values: 250KHz or 500KHz by setting the proper
voltage at the EAREF pin (see Table 3. Pins function and section 4.3 Internal and external
reference).
5.2 Internal LDO
An internal LDO supplies the internal circuitry of the device. The input of this stage is the VCC
pin and the output (5V) is the VCCDR pin (Figure 3.).
Figure 3. LDO block diagram.
4.5÷14V
LDO
The LDO can be by-passed, providing directly a 5V voltage to VCCDR. In this case VCC and
VCCDR pins must be shorted together as shown in Figure 4. VCCDR pin must be filtered with at
least 1µF capacitor to sustain the internal LDO during the recharge of the bootstrap capacitor.
VCCDR also represents a voltage reference for PGOOD pin (see Table 3. Pins Function).
11/33
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet L6732.PDF ] | |
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