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PDF IRDCIP1001-B Data sheet ( Hoja de datos )
| Número de pieza | IRDCIP1001-B | |
| Descripción | 5VIN to 12VIN Single Phase Synchronous Buck Converter using iP1001 | |
| Fabricantes | International Rectifier | |
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R DEFERENCE ESIGN IRDCiP1001-B
International Rectifier • 233 Kansas Street, El Segundo, CA 90245 USA
IRDCiP1001-B, 200kHz to 300kHz, 20A, 5VIN to 12VIN Single
Phase Synchronous Buck Converter using iP1001
Overview
In this document, Table 1 and Figure 1 are provided to enable engineers to
easily evaluate the iP1001 in a single phase configuration that is capable of
providing up to 20A in a lab environment without airflow. Figures 3, 4, 5 and
6 and the complete bill of materials in Table 2 are provided as a reference
design to enable engineers to very quickly and easily design a single phase
converter. In order to optimize this design to your specific requirements,
refer to the iP1001 data sheet for guidelines on external component selection
and user adjustable limits and specifications for the iP1001. Custom designs
may require layout modifications.
Demoboard Quick Start Guide
Initial Settings:
IRDCiP1001-B De m oboa rd
Ope ra tng Conditions
Min Max
VIN
4.5V
12V
V OU T
0.925V
3.3V
IOUT
See Fig.1
z The output is set to 1.3V, but can be adjusted from 0.925V to 2.0V by
setting SW1 according to the VID codes provided in Table 1. The output voltage can be adjusted to allow up to
3.3VOUT by adding R3 & R4 with the DAC set to 2VOUT. Refer to equation 1 for R3 & R4 values. R4 should
be removed for output voltages below 2V, and R3 should be set to zero ohms (see Table 2).
z The switching frequency is centered around 300kHz with the Freq pin floating.
z The input voltage range can be extended below 5VIN by populating the mini-boost circuit on the demo board. Refer to
IRDCiP1001-A reference design documentation for direction on changing the configuration of the demo board.
Procedure for Connecting and Powering Up Demoboard:
1. Apply input voltage (5V - 12V) across VIN and PGND. The input voltage (VIN) pin and logic power pin (VDD) are provided
as separate inputs. For 5VIN operation only, the VIN and VDD pins can be connected together. For logic power (VDD),
connect 5V power source across +5V (TP1) and PGND (TP2).
2. Apply load across VOUT pad and PGND pad.
3. The ENABLE pin is controlled via switch 8 on SW1. This pin is supplied in low state. Once pulled high the
output is enabled.
4. Adjust load accordingly.
IRDCiP1001-B Recommended Operating Conditions
(refer to the iP1001 datasheet for maximum operating conditions)
Input voltage:
Output voltage:
Output current:
Switching Freq:
4.5 - 12V (VDD = 4.5V to 5.5V)
DAC selectable between 0.925V - 2.0V (with extended operating range to 3.3V with R3 & R4)
Up to 20A depending on duty factor (refer to load line curve in Fig. 1).
200kHz or 300kHz selectable.
09/11/02
1 page  
IRDCiP1001-B
Fig. 4 - Component Placement Top Layer
www.irf.com
Fig. 5 - Component Placement Bottom Layer
5
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet IRDCIP1001-B.PDF ] | |
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