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Número de pieza | ICS853058 | |
Descripción | LVPECL/ECL CLOCK MULTIPLEXER | |
Fabricantes | ICST | |
Logotipo | ||
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Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS853058
8:1, DIFFERENTIAL-TO-
3.3V OR 2.5V LVPECL/ECL CLOCK MULTIPLEXER
GENERAL DESCRIPTION
The ICS853058 is an 8:1 Differential-to-3.3V or
ICS 2.5V LVPECL / ECL Clock Multiplexer which can
HiPerClockS™ operate up to 2.5GHz and is a member of the
HiPerClockS™ family of High Performance Clock
Solutions from ICS. The ICS853058 has 8 differ-
ential selectable clock inputs. The PCLK, nPCLK input pairs
can accept LVPECL, LVDS, CML or SSTL levels. The fully dif-
ferential architecture and low propagation delay make it ideal
for use in clock distribution circuits. The select pins have inter-
nal pulldown resistors. The SEL2 pin is the most significant bit
and the binary number applied to the select pins will select the
same numbered data input (i.e., 000 selects PCLK0, nPCLK0).
FEATURES
• High speed 8:1 differential multiplexer
• 1 differential 3.3V or 2.5V LVPECL output
• 8 selectable differential PCLK, nPCLK inputs
• PCLKx, nPCLKx pairs can accept the following
differential input levels: LVPECL, LVDS, CML, SSTL
• Maximum output frequency: 2.5GHz
• Translates any single ended input signal to
LVPECL levels with resistor bias on nPCLKx input
• Part-to-part skew: TBD
• Propagation delay: 620ps (typical)
• LVPECL mode operating voltage supply range:
VCC = 2.375V to 3.465V, VEE = 0V
• ECL mode operating voltage supply range:
V = 0V, V = -3.465V to -2.375V
CC EE
• -40°C to 85°C ambient operating temperature
BLOCK DIAGRAM
PCLK0
nPCLK0
PCLK1
nPCLK1
PCLK2
nPCLK2
PCLK3
nPCLK3
PCLK4
nPCLK4
PCLK5
nPCLK5
PCLK6
nPCLK6
PCLK7
nPCLK7
000
001
010
011
100
101
110
111
SEL2 SEL1 SEL0
PIN ASSIGNMENT
PCLK0 1
24 PCLK7
nPCLK0 2
23 nPCLK7
PCLK1 3
22 PLCK6
nPCLK1 4
21 nPCLK6
VCC 5
20 VCC
SEL0 6
19 Q0
SEL1 7
18 nQ0
SEL2 8
17 VEE
PCLK2 9
16 PCLK5
nPCLK2 10 15 nPCLK5
PCLK3 11 14 PCLK4
nPCLK3 12 13 nPCLK4
Q0
nQ0
ICS853058
24-Lead, 173-MIL TSSOP
4.4mm x 7.8mm x 0.92mm body package
G Package
Top View
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial
product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.
853058AG
www.icst.com/products/hiperclocks.html
REV. A APRIL 13, 2004
1
1 page Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS853058
8:1, DIFFERENTIAL-TO-
3.3V OR 2.5V LVPECL/ECL CLOCK MULTIPLEXER
TABLE 4D. ECL DC CHARACTERISTICS, VCC = 0V; VEE = -3.465V TO -2.375V
Symbol Parameter
Test Conditions
Minimum Typical
VOH
VOL
VIH
VIL
VPP
VCMR
IIH
Output High Voltage; NOTE 1
Output Low Voltage; NOTE 1
Input High Voltage
Input Low Voltage
Peak-to-Peak Input Voltage
Input High Voltage
Common Mode Range; NOTE 2, 3
Input
PCLK0:PCLK7
High Current nPCLK0:nPCLK7
-1.225
-1.87
VEE + 1.2
-1.005
-1.78
800
IIL
Input Low
Current
PCLK0:PCLK7
nPCLK0:nPCLK7
-10
-150
NOTE 1: Outputs terminated with 50Ω to VCC - 2V.
NOTE 2: Common mode voltage is defined as VIH.
NOTE 3: For single-ended applications, the maximum input voltage for PCLKx, nPCLKx is VCC + 0.3V.
Maximum Units
V
V
-0.94
V
-1.535
V
mV
0V
150 µA
µA
µA
TABLE 5. AC CHARACTERISTICS, VCC = 0V; VEE = -3.465V TO -2.375V OR VCC = 2.375 TO 3.465V; VEE = 0V
Symbol Parameter
Test Conditions
Minimum Typical Maximum
fMAX
tPD
tsk(pp)
Output Frequency
Propagation Delay; NOTE 1
Part-to-Part Skew; NOTE 2, 3
620
TBD
2.5
tR / tF
Output Rise/Fall Time
20% to 80%
150
All parameters measured up to 1.3GHz unless noted otherwise.
NOTE 1: Measured from the differential input crossing point to the differential output crossing point.
NOTE 2: Defined as skew between outputs on different devices operating at the same supply voltages
and with equal load conditions. Using the same type of inputs on each device, the outputs are measured
at the differential cross points.
NOTE 3: This parameter is defined according with JEDEC Standard 65.
Units
GHz
ps
ps
ps
853058AG
www.icst.com/products/hiperclocks.html
5
REV. A APRIL 13, 2004
5 Page Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS853058
8:1, DIFFERENTIAL-TO-
3.3V OR 2.5V LVPECL/ECL CLOCK MULTIPLEXER
POWER CONSIDERATIONS
This section provides information on power dissipation and junction temperature for the ICS853058.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS853058 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for VCC = 3.3V ± 5% = 3.465V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
• Power (core)MAX = VCC_MAX * IEE_MAX = 3.465V * 38mA = 131.67mW
• Power (outputs)MAX = 30.94mW/Loaded Output pair
If all outputs are loaded, the total power is 1 * 30.94mW = 30.94mW
Total Power (3.465V, with all outputs switching) = 131.67mW + 30.94mW = 162.61mW
_MAX
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the
device.The maximum recommended junction temperature for HiPerClockSTM devices is 125°C.
The equation for Tj is as follows: Tj = θJA * Pd_total + TA
Tj = Junction Temperature
θJA = junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
TA = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θJA must be used. Assuming a
moderate air flow of 1 meter per second and a multi-layer board, the appropriate value is 65°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
85°C + 0.163W * 65°C/W = 95.6°C. This is well below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow,
and the type of board (single layer or multi-layer).
TABLE 6. THERMAL RESISTANCE θJA FOR 24-PIN TSSOP FORCED CONVECTION
θJA by Velocity (Meters per Second)
Multi-Layer PCB, JEDEC Standard Test Boards
0
70°C/W
1
65°C/W
2.5
62°C/W
853058AG
www.icst.com/products/hiperclocks.html
11
REV. A APRIL 13, 2004
11 Page |
Páginas | Total 15 Páginas | |
PDF Descargar | [ Datasheet ICS853058.PDF ] |
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