|
|
PDF ICS84320I-01 Data sheet ( Hoja de datos )
| Número de pieza | ICS84320I-01 | |
| Descripción | CRYSTAL-TO-3.3V DIFFERENTIAL | |
| Fabricantes | ICST | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de ICS84320I-01 (archivo pdf) en la parte inferior de esta página. Total 18 Páginas | ||
|
No Preview Available !
www.DataSheet4U.com
Integrated
Circuit
Systems, Inc.
ICS84320I-01
780MHZ, CRYSTAL-TO-3.3V DIFFERENTIAL
LVPECL FREQUENCY SYNTHESIZER
GENERAL DESCRIPTION
The ICS84320I-01 is a general purpose, dual
ICS output Crystal-to-3.3V Differential LVPECL
HiPerClockS™ High Frequency Synthesizer and a member of
the HiPerClockS™ family of High Performance
Clock Solutions from ICS. The ICS84320I-01
has a selectable TEST_CLK or crystal inputs. The VCO
operates at a frequency range of 620MHz to 780MHz. The
VCO frequency is programmed in steps equal to the
value of the input reference or crystal frequency. The VCO
and output frequency can be programmed using the
serial or parallel interfaces to the configuration logic. The
low phase noise characteristics of the ICS84320I-01
make it an ideal clock source for 10 Gigabit Ethernet,
SONET, and Serial Attached SCSI applications.
BLOCK DIAGRAM
VCO_SEL
XTAL_SEL
TEST_CLK
XTAL_IN
XTAL_OUT
OSC
0
1
MR
S_LOAD
S_DATA
S_CLOCK
nP_LOAD
PLL
PHASE DETECTOR
VCO
÷M
÷N
÷1
0 ÷2
÷4
1 ÷8
CONFIGURATION
INTERFACE
LOGIC
FEATURES
• Dual differential 3.3V LVPECL outputs
• Selectable crystal oscillator interface
or LVCMOS/LVTTL TEST_CLK
• Output frequency range: 77.5MHz to 780MHz
• Crystal input frequency range: 14MHz to 40MHz
• VCO range: 620MHz to 780MHz
• Parallel or serial interface for programming counter
and output dividers
• Duty cycle: 44% - 56% (N > 1)
• RMS period jitter: 2.0ps (typical)
• RMS phase jitter at 155.52MHz, using a 38.88MHz crystal
(12kHz to 20MHz): 2.38ps (typical)
• RMS phase noise at 155.52MHz (typical)
Offset
Noise Power
100Hz ................ -90.5 dBc/Hz
1kHz ............... -114.2 dBc/Hz
10kHz ............... -123.6 dBc/Hz
100kHz ............... -128.1 dBc/Hz
• 3.3V supply voltage
• -40°C to 85°C ambient operating temperature
• Available in both, Standard and RoHS/Lead-Free
compliant packages
PIN ASSIGNMENT
FOUT0
nFOUT0
FOUT1
nFOUT1
TEST
32 31 30 29 28 27 26 25
M5 1
24 XTAL_OUT
M6 2
M7 3
ICS84320I-01 23 TEST_CLK
32-Lead LQFP
22 XTAL_SEL
M8 4 7mm x 7mm x 1.4mm 21 VCCA
N0 5
package body
20 S_LOAD
N1 6
nc 7
Y Package
Top View
19 S_DATA
18 S_CLOCK
VEE 8
17 MR
9 10 11 12 13 14 15 16
M0:M8
N0:N1
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial
product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.
84320AYI-01
www.icst.com/products/hiperclocks.html
REV. A AUGUST 11, 2005
1
1 page  
Integrated
Circuit
Systems, Inc.
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, VCC
Inputs, VI
4.6V
-0.5V to VCC + 0.5 V
Outputs, VO (LVCMOS)
Outputs, I (LVPECL)
O
Continuous Current
Surge Current
Package Thermal Impedance, θJA
Storage Temperature, TSTG
-0.5V to VCCO + 0.5V
50mA
100mA
47.9°C/W (0 lfpm)
-65°C to 150°C
ICS84320I-01
780MHZ, CRYSTAL-TO-3.3V DIFFERENTIAL
LVPECL FREQUENCY SYNTHESIZER
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device.These ratings are stress specifications only. Functional
operation of product at these conditions or any conditions be-
yond those listed in the DC Characteristics or AC Character-
istics is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect product reliability.
TABLE
4A.
POWER
SUPPLY
DC
CHARACTERISTICS,
V
CC
=
V
CCA
=
V
CCO
=
3.3V±5%,
TA
=
-40°C
TO
85°C
Symbol Parameter
Test Conditions
Minimum Typical
VCC
VCCA
VCCO
IEE
ICCA
Core Supply Voltage
Analog Supply Voltage
Output Supply Voltage
Power Supply Current
Analog Supply Current
3.135
3.135
3.135
3.3
3.3
3.3
Maximum
3.465
3.465
3.465
155
22
Units
V
V
V
mA
mA
TABLE 4B. LVCMOS / LVTTL DC CHARACTERISTICS, VCC = VCCA = VCCO = 3.3V±5%, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions Minimum Typical
VCO_SEL, XTAL_SEL, MR,
VIH
Input
S_LOAD, nP_LOAD, N0:N1,
High Voltage S_DATA, S_CLOCK, M0:M8
TEST_CLK
2
2
VCO_SEL, XTAL_SEL, MR,
VIL
Input
S_LOAD, nP_LOAD, N0:N1,
Low Voltage S_DATA, S_CLOCK, M0:M8
TEST_CLK
-0.3
-0.3
M0-M4, M6-M8, N0, N1, MR,
IIH
Input
High Current
S_CLOCK, TEST_CLK,
S_DATA, S_LOAD, nP_LOAD
VCC = VIN = 3.465V
M5, XTAL_SEL, VCO_SEL
VCC = VIN = 3.465V
M0-M4, M6-M8, N0, N1, MR,
S_CLOCK, TEST_CLK,
VCC = 3.465V,
IIL
Input
S_DATA, S_LOAD, nP_LOAD
Low Current
M5, XTAL_SEL, VCO_SEL
VIN = 0V
VCC = 3.465V,
VIN = 0V
-5
-150
VOH
Output
High Voltage
TEST; NOTE 1
2.6
Maximum
VCC + 0.3
VCC + 0.3
0.8
1.3
150
5
Units
V
V
V
V
µA
µA
µA
µA
V
VOL
Output
Low Voltage
TEST; NOTE 1
NOTE
1:
Outputs
terminated
with
50Ω
to
V /2.
CCO
84320AYI-01
www.icst.com/products/hiperclocks.html
0.5 V
REV. A AUGUST 11, 2005
5
5 Page 
Integrated
Circuit
Systems, Inc.
ICS84320I-01
780MHZ, CRYSTAL-TO-3.3V DIFFERENTIAL
LVPECL FREQUENCY SYNTHESIZER
CRYSTAL INPUT INTERFACE
A crystal can be characterized for either series or parallel mode
operation.The ICS84320I-01 has a built-in crystal oscillator circuit.
This interface can accept either a series or parallel crystal without
additional components and generate frequencies with accuracy
suitable for most applications. Additional accuracy can be
achieved by adding two small capacitors C1 and C2 as shown in
Figure 3.
X1
18pF Parallel Crystal
XTAL_OUT
C1
18p
XTAL_IN
C2
22p
Figure 3. CRYSTAL INPUt INTERFACE
TERMINATION FOR LVPECL OUTPUTS
The clock layout topology shown below is a typical termina-
tion for LVPECL outputs. The two different layouts mentioned
are recommended only as guidelines.
FOUT and nFOUT are low impedance follower outputs that
generate ECL/LVPECL compatible outputs.Therefore, terminat-
ing resistors (DC current path to ground) or current sources
must be used for functionality. These outputs are designed to
drive 50Ω transmission lines. Matched impedance techniques
should be used to maximize operating frequency and minimize
signal distortion. Figures 4A and 4B show two different layouts
which are recommended only as guidelines. Other suitable clock
layouts may exist and it would be recommended that the board
designers simulate to guarantee compatibility across all printed
circuit and clock component process variations.
FOUT
Zo = 50Ω
FIN
Zo = 50Ω
50Ω
RTT =
1
((VOH + VOL) / (VCC – 2)) – 2
Zo
50Ω
VCC - 2V
RTT
FOUT
3.3V
125Ω
125Ω
Zo = 50Ω
FIN
Zo = 50Ω
84Ω
84Ω
FIGURE 4A. LVPECL OUTPUT TERMINATION
FIGURE 4B. LVPECL OUTPUT TERMINATION
84320AYI-01
www.icst.com/products/hiperclocks.html
11
REV. A AUGUST 11, 2005
11 Page | ||
| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet ICS84320I-01.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| ICS84320I-01 | CRYSTAL-TO-3.3V DIFFERENTIAL | ICST |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |