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PDF ICS84325 Data sheet ( Hoja de datos )
| Número de pieza | ICS84325 | |
| Descripción | CRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER | |
| Fabricantes | ICST | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de ICS84325 (archivo pdf) en la parte inferior de esta página. Total 15 Páginas | ||
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Integrated
Circuit
Systems, Inc.
ICS84325
CRYSTAL-TO-3.3V LVPECL
FREQUENCY SYNTHESIZER WITH FANOUT BUFFER
GENERAL DESCRIPTION
ICS
The ICS84325 is a Crystal-to-3.3V LVPECL
Frequency Synthesizer with Fanout Buffer and a
HiPerClockS™ member of the HiPerClockS™ family of High
Performance Clock Solutions from ICS. The
output frequency can be programmed using
frequency select pins. The low phase noise characteristics
of the ICS84325 make it an ideal clock source for Fibre
Channel 1, Fibre Channel 2, Infiniband and Gigabit
Ethernet applications.
FUNCTION TABLE
Inputs
XTAL Output Frequency
MR F_SEL1 F_SEL0
F_OUT
1X
X
LOW
00
0 25.5MHz
106.25MHz
00
1 25.5MHz
212.5MHz
01
0 25MHz
125MHz
01
1 25MHz
250MHz
FEATURES
• 6 differential 3.3V LVPECL outputs
• Crystal oscillator interface
• Output frequency range: 106.25MHz to 250MHz
• Crystal input frequency: 25MHz and 25.5MHz
• Output skew: 60ps (maximum)
• RMS phase jitter at 212.5MHz, using a 25.5MHz crystal
(637KHz to 10MHz): 2.76ps
• Phase noise: Typical at 212.5MHz
Offset
Noise Power
100Hz ................. -92 dBc/Hz
1KHz ................. -112 dBc/Hz
10KHz ................. -120 dBc/Hz
100KHz ................. -122 dBc/Hz
• 3.3V supply voltage
• 0°C to 70°C ambient operating temperature
• Lead-Free package available.
• Industrial temperature information available upon request
BLOCK DIAGRAM
PIN ASSIGNMENT
XTAL1
XTAL2
OSC
PLL
Feedback
Divider
F_SEL1 MR
/0 6 Q0:Q5
Output
/1
Divider
6 nQ0:nQ5
Q0
nQ0
Q1
nQ1
Q2
nQ2
Q3
nQ3
Q4
nQ4
Q5
nQ5
1
2
3
4
5
6
7
8
9
10
11
12
2 4 VCCO
23 F_SEL0
22 F_SEL1
21 MR
20 XTAL1
19 XTAL2
1 8 VEE
1 7 VCCA
16 VCC
15 PLL_SEL
1 4 VEE
1 3 VCCO
PLL_SEL
F_SEL0
ICS84325
24-Lead, 300-MIL SOIC
7.5mm x 15.33mm x 2.3mm body package
M Package
Top View
84325EM
www.icst.com/products/hiperclocks.html
1
REV. B OCTOBER 11, 2004
1 page  
Integrated
Circuit
Systems, Inc.
ICS84325
CRYSTAL-TO-3.3V LVPECL
FREQUENCY SYNTHESIZER WITH FANOUT BUFFER
TYPICAL PHASE NOISE
84325EM
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
-170
-180
-190
100
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
-170
-180
-190
100
➚ Fibre Channel 1
Bandpass Filter
➚Raw phase noise data
Jitter BW Jitter Filter Diff. Jitter
Source
Mode
Process Result
Noise only
Freq. carrier
106.250M Hz
Start Freq.
Stop Freq.
10.000
40.000M Hz
Jitter
2.62 ps
➚
Phase noise result by adding
Bandpass Filter to raw data
1k 10k 100k 1M 10M 100M
OFFSET FREQUENCY (HZ)
➚ Fibre Channel 2
Bandpass Filter
➚Raw phase noise data
Jitter BW Jitter Filter Diff. Jitter
Source
Mode
Process Result
Noise only
Freq. carrier
Start Freq.
212.500M Hz
Stop Freq.
10.000
40.000M Hz
Jitter
2.76 ps
➚
Phase noise result by adding
Bandpass Filter to raw data
1k 10k 100k 1M
OFFSET FREQUENCY (HZ)
www.icst.com/products/hiperclocks.html
5
10M 100M
REV. B OCTOBER 11, 2004
5 Page 
Integrated
Circuit
Systems, Inc.
ICS84325
CRYSTAL-TO-3.3V LVPECL
FREQUENCY SYNTHESIZER WITH FANOUT BUFFER
3. Calculations and Equations.
The purpose of this section is to derive the power dissipated into the load.
LVPECL output driver circuit and termination are shown in Figure 6.
VCCO
Q1
VOUT
RL
50
V - 2V
CCO
FIGURE 6. LVPECL DRIVER CIRCUIT AND TERMINATION
To calculate worst case power dissipation into the load, use the following equations which assume a 50Ω load, and a termination
voltage of V - 2V.
CCO
• For logic high, V = V = V
– 1.0V
OUT
OH_MAX
CCO_MAX
(V - V ) = 1.0V
CCO_MAX OH_MAX
• For logic low, V = V = V
– 1.7V
OUT
OL_MAX
CCO_MAX
(V - V ) = 1.7V
CCO_MAX OL_MAX
Pd_H is power dissipation when the output drives high.
Pd_L is the power dissipation when the output drives low.
Pd_H = [(V – (V
- 2V))/R ] * (V
- V ) = [(2V - (V
- V ))/R ] * (V
-V )=
OH_MAX
CCO_MAX
L CCO_MAX OH_MAX
CCO_MAX OH_MAX
L
CCO_MAX OH_MAX
[(2V - 1V)/50Ω) * 1V = 20.0mW
Pd_L = [(V – (V
- 2V))/R ] * (V
- V ) = [(2V - (V
- V ))/R ] * (V
-V )=
OL_MAX
CCO_MAX
L CCO_MAX OL_MAX
CCO_MAX OL_MAX
L
CCO_MAX OL_MAX
[(2V - 1.7V)/50Ω) * 1.7V = 10.2mW
Total Power Dissipation per output pair = Pd_H + Pd_L = 30.2mW
84325EM
www.icst.com/products/hiperclocks.html
11
REV. B OCTOBER 11, 2004
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet ICS84325.PDF ] | |
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