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PDF KM641003A Data sheet ( Hoja de datos )
| Número de pieza | KM641003A | |
| Descripción | CMOS SRAM | |
| Fabricantes | Samsung Semiconductor | |
| Logotipo |  |
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PRELIMINARY
KM641003A
CMOS SRAM
Document Title
256Kx4 High Speed Static RAM(5V Operating), Revolutionary Pin out.
Operated at Commercial and Industrial Temperature Range.
Revision History
Rev.No.
Rev. 0.0
Rev. 1.0
Rev. 2.0
History
Initial release with Preliminary.
Release to final Data Sheet.
1.1. Delete Preliminary
Update D.C parameters.
2.1. Update D.C parameters.
Items
Previous spec.
(12/15/17/20ns part)
Icc 200/190/180/170mA
Isb 30mA
Isb1 10mA
Updated spec.
(12/15/17/20ns part)
150/145/145/140mA
25mA
8mA
Draft Data
Apr. 22th, 1995
Feb. 29th, 1996
Remark
Preliminary
Final
Jul. 16th, 1996
Final
Rev. 3.0
Rev. 4.0
Add Industrial Temperature Range parts.
3.1. Add Industrial Temperature Range parts with the same parame-
ters as Commercial Temperature Range parts.
3.1.1. Add KM641003AI parts for Industrial Temperature Range.
3.1.2. Add ordering information.
3.1.3. Add the condition for operating at Industrial Temp. Range.
3.2. Add the test condition for Voh1 with Vcc=5V±5% at 25°C
3.3. Add timing diagram to define tWP as ″(Timing Wave Form of
Write Cycle(CS=Controlled)″
4.1. Delete Industrial Temperature Range Part
4.2. Delete TSOP2 Package
4.3. Delete 17ns Part
Jun. 2nd, 1997
Final
Feb. 25th, 1998 Final
The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right
to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters of this
device. If you have any questions, please contact the SAMSUNG branch office near your office, call or contact Headquarters.
-1-
Rev 4.0
February 1998
1 page  
www.DataSheet4U.com
KM641003A
WRITE CYCLE
Parameter
Write Cycle Time
Chip Select to End of Write
Address Setup Time
Address Valid to End of Write
Write Pulse Width(OE High)
Write Pulse Width(OE Low)
Write Recovery Time
Write to Output High-Z
Data to Write Time Overlap
Data Hold from Write Time
End Write to Output Low-Z
PRELIMINARY
CMOS SRAM
Symbol
tWC
tCW
tAS
tAW
tWP
tWP1
tWR
tWHZ
tDW
tDH
tOW
KM641003A-12
Min Max
12 -
8-
0-
8-
8-
12 -
0-
06
6-
0-
3-
KM641003A-15
Min Max
15 -
10 -
0-
10 -
10 -
15 -
0-
07
7-
0-
3-
KM641003A-20
Min Max
20 -
12 -
0-
12 -
12 -
20 -
0-
09
9-
0-
3-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
TIMMING DIAGRAMS
TIMING WAVEFORM OF READ CYCLE(1) (Address Controlled, CS=OE=VIL, WE=VIH)
Address
Data Out
tOH
Previous Valid Data
tAA
tRC
Valid Data
TIMING WAVEFORM OF READ CYCLE(2) (WE=VIH)
Address
CS
OE
Data out
VCC
Current
ICC
ISB
tAA
tCO
tOE
tOLZ
tLZ(4,5)
tPU
50%
tRC
tHZ(3,4,5)
Valid Data
tOHZ
tOH
tPD
50%
-5-
Rev 4.0
February 1998
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet KM641003A.PDF ] | |
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