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PDF CDB4923 Data sheet ( Hoja de datos )
| Número de pieza | CDB4923 | |
| Descripción | (CDB4923 / CDB49300) Evaluation Board | |
| Fabricantes | Cirrus Logic | |
| Logotipo |  |
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CDB4923
CDB49300
Evaluation Board for CS4923/CS49300 Families
Features
l CDB4923 demonstrates 5.1 channel decode
capability of the CS4923 family
l CDB49300 demonstrates 5.1 channel
decode capability of CS49300 family
l 6 discrete analog outputs driven by CS4340
DACs
l 4 S/PDIF optical outputs
l Accepts analog input, S/PDIF digital input,
Bursty compressed data
l Discrete PLL which can provide multiple
sampling frequencies
l Interfaces to a personal computer through
the parallel port
l Stake headers provide convenient location
for direct wiring to control signals from off-
board microcontroller
l Interface for external memory card
l Digital and analog patch areas
I
Description
The CDB4923 and CDB49300 customer development
boards provide the means to fully evaluate the
CS4923/4/5/6/7/8 and CS49300 family of audio decod-
ers. Compressed data can be delivered in IEC61937
format via the S/PDIF port and in bursty mode via the PC
interface. PCM data can be accepted through the digital
input connectors or from the on-board ADC. Six chan-
nels of audio are provided on the six analog outputs and
on three optical S/PDIF transmitters. CLKIN for the DSP
can be derived either from the on-board oscillator or the
external PLL. MCLK can be extracted from incoming
S/PDIF streams, generated with the external PLL, or
mastered by the audio decoder.
The CDB4923/300 incorporates a Crystal Multichannel
Audio Decoder, the CS4340 24-Bit Audio D/A Converter,
the CS8414 Digital Audio Interface Receiver, the
CS8404A Digital Audio Interface Transmitter, and the
CS5334 20-Bit Stereo A/D Converter.
ORDERING INFORMATION
CDB4923
CDB49300
Evaluation Board
Evaluation Board
Digital Input
Digital Output
CS8404A CS8404A CS8404A
RESET
DIGITAL SOUND
™
Control
Interface
PLD
OSC
+2.5V
+3.3V
CS492x
CS493xx
CS4340
CS4340
CS4340
CS5334
Analog
Output
Stereo
Analog In
C R Y S T A L®
PROCESSING
Preliminary Product Information
Patch Area
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
P.O. Box 17847, Austin, Texas 78760
(512) 445 7222 FAX: (512) 445 7581
http://www.cirrus.com
Copyright Cirrus Logic, Inc. 2000
(All Rights Reserved)
JAN ‘00
DS262DB2
1
1 page  
CDB4923 CDB49300
1. CDB4923 VS. CDB49300
The CDB4923 and CDB49300 are two customer
development boards built from a single platform -
the CDB4923/300. This development board replac-
es the CDB4923 Rev. A and Rev. B.
Although the CDB4923/CDB49300 boards look
very similar, it is important to be aware that when
shipped from the factory, the CDB4923 is config-
ured for only the CS4923 family of audio decoders
and the CDB49300 is configured only for the
CS49300 family of audio decoders.
The features distinguishing the two boards are the
following:
• DSP Power Setting
• DSP PLL Filter Topology
1.1 DSP Power
The CS4923 family is designed to operate with a
core voltage of +3.3 V, and the CDB4923 is
shipped with the DSP Power jumper in the +3.3 V
position. The CS49300 family is designed to oper-
ate with a core voltage of +2.5 V, and the
CDB49300 is shipped with the DSP Power jumper
in the +2.5 V position. Attempting to use an audio
decoder on the wrong board (e.g., CS49300 on a
CDB4923) can cause unpredictable results and
damage the decoder.
1.2 DSP PLL Filter
The PLL of the CS4923 is different than that of the
CS49300. Consequently, the optimized external
PLL filters for each family of audio decoders is dif-
ferent. The CDB4923 is optimized for the CS4923
family and the CDB49300 is optimized for the
CS49300 family. Attempting to use an audio de-
coder on the wrong board (e.g., CS49300 on a
CDB4923) can cause unpredictable results.
Specifically, the relevant PLL filter components
for the CDB4923 are:
• R246 = 0 Ω
• C155 = 0.22 µF
The relevant PLL filter components for the
CDB49300 are:
• R246 = 33 kΩ
• C155 = 0.22 µF
• C113 = 0.01 µF
Although the boards are tailored for one specific
family of audio decoders, the operation of the
CDB4923 and CDB49300 is effectively the same.
This document will generically refer to the
CDB4923/300 except in those instances where
there is a difference between the boards.
2. OPERATION
The CDB4923/300 is designed to allow full evalu-
ation of the CS4923 family and CS49300 family of
audio DSPs. The members of each audio decoder
family are electrically equivalent, so it is possible
to use any member of the CS4923 family in the
CDB4923 and any member of the CS49300 family
in the CDB49300. In the context of this document,
CS492x should be interpreted as any member of the
CS4923 family and CS493xx should be understood
to be any member of the CS49300 family.
The CDB4923/300 is composed of 8 distinct re-
gions: DSP, Control Interface, Control Logic,
Clocks, Analog I/O, Digital I/O, Patch area, and
Power. Each board region has a number of compo-
nents and will be briefly discussed below. A more
thorough description of each will be given in dedi-
cated sections of this document which can be
quickly located in the Table of Contents.
The DSP section includes the audio decoder
(CS492x Multichannel Audio Decoder or CS493xx
Universal Audio Decoder) under evaluation, jump-
ers for controlling DSP power and DSP configura-
tion pins, and stake headers which provide access
to all relevant DSP pins. The jumpers allow the
user to select between +2.5 V or +3.3 V on the DSP
power pins (pre-configured at the factory for the
DS262DB2
5
5 Page 
CDB4923 CDB49300
CS8404A CS8404A CS8404A
CS8414
Data
XMT958
CDI
DAI
Parallel Compressed Data
CS492x
CS493x
x
PCM Out
Stereo PCM
CS4340
CS4340
CS4340
CS5334
Figure 2. CDB4923/300 Data Paths
PLD
Mode
2
3
4
5
DATA_SEL2 DATA_SEL1 DATA_SEL0
LO HI LO
LO HI HI
HI LO LO
HI LO HI
CS492x/CS493xx
CMPDAT
PC
S/PDIF — CS8414
S/PDIF — CS8414
A/D — CS5334
CS492x/CS493xx
SDATAN1
A/D — CS5334
S/PDIF — CS8414
A/D — CS5334
A/D — CS5334
Table 3. PROVIDED Data Selection Modes (PLD version AB-X)
MCLK
SOURCE
DSP
CS8414
CS8414
OSC/PLL
Digital Audio Source
Description
S/PDIF - CS8414
The CS8414 (U13) delivers the payload from an IEC60958 (linear PCM) or IEC61937 (nonlinear
PCM) encoded bit-stream. The incoming S/PDIF stream is connected to either J32 or J30.
A/D - CS5334
The CS5334 (U25) delivers stereo PCM which has been encoded from the analog input signals on
J55 and J56.
PC A compressed digital audio stream is delivered in bursty format to the parallel port of the
CS492x/CS493xx from a file on the PC. This transfer mode requires that the CDB4923/300 is in a
parallel communication mode, and the PARLLPLY.EXE program is then used to deliver com-
pressed data through the PC interface.
NOTE: This data source is valid only for compressed audio and can be used only with parallel
communication modes (i.e. INTEL or Motorola mode).
Table 4. Digital Audio Sources
DS262DB2
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet CDB4923.PDF ] | |
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