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PDF CDB5364 Data sheet ( Hoja de datos )
| Número de pieza | CDB5364 | |
| Descripción | Evaluation Board | |
| Fabricantes | Cirrus Logic | |
| Logotipo |  |
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CDB5364
Evaluation Board for CS5364
Features
! Single-Ended to Differential Analog Inputs
! 3.3 V Logic Interface
! Connection for DSP Serial I/O
! Windows®-Compatible CDB5364 Software
Supplied by Cirrus to Configure the CS5364
! On-Board CS8406 to Generate S/PDIF and
EIAJ-340 Digital Audio
Description
The CDB5364 evaluation board is an excellent means
for quickly evaluating the CS5364 24-bit, 192 kHz A/D
converter. Evaluation requires only a digital signal ana-
lyzer, an analog signal source, and a power supply.
On-board DIP switches configure the CS5364 in Stand-
Alone mode, avoiding the need for a PC.
For software-based device configuration, the Control
Port mode is used by attaching a host PC to the Evalu-
ation Board and executing the provided FlexGUI
software.
! Requires Only an Analog Signal Source, Power
Supplies and, optionally, a PC for a Complete
Analog-to-Digital-Converter Evaluation System
ORDERING INFORMATION
CDB5364
Evaluation Board
RS232
USB
8051 Micro
Control
I²C or SPI
RCA 4
Jacks
Analog
Input
Buffers
4
4
CS5364 A/D
Ain+
Ain-
Clks/Data
FPGA
S/PDIF
Output
CS8406
AES/EBU
S/PDIF
Transmitter
Optical
Coaxial
Buffers
http://www.cirrus.com
Audio
Clks/Data
Copyright © Cirrus Logic, Inc. 2005
(All Rights Reserved)
SEPTEMBER '05
DS625DB1
1 page  
CDB5364
3.2 Control-Port Evaluation
The CDB5364 is shipped with a Cirrus Logic designed Microsoft Windows-based program that allows full
control over the CS5364 internal registers. This software program is called the FlexGUI, and it is loaded by
executing the FlexLoader.exe file. Hardware interface to the FlexGUI is provided by connecting an RS-232
cable or a USB cable between a host PC and the CDB5364. Once the FlexGUI is loaded, the Evaluation
Board DIP switches are ignored, and all register settings are available for reading and writing using software
control. Testing configurations may be quickly reproduced by using the FlexGUI to save and restore unique
register settings.
Configure the board for Control Port operation using the instructions that follow.
• Connect jumpers.
– J7 - Install 5 jumpers to the left side of J7, enabling the I²C control interface.
– J81, J95 - Install jumpers to these positions, grounding XTI and XTO of the CS5364.
– J9 - Install a jumper at the +5 V position, allowing VA to be supplied by the +5 V supply (VA may be
externally supplied at the VA binding post by moving jumper J9 to the VA EXT position).
• Add an oscillator of choice to socket Y1 to provide a Master Timing Clock for the system. A crystal may
also be used by removing the canned oscillator and jumpers J81, J95 and J11. The CDB5364 Evaluation
Board is shipped with 39 pF loading capacitors for crystal-based oscillators. Soldering pads are provided
on the board for users that require third overtone tank circuit operation or different loading capacitors.
• Connect the power supply common to the GND binding post. Connect +5 V, +12 V and -12 V to the bind-
ing posts as marked on the board silkscreen.
The FlexGUI provides two convenient views of the CDB5364 Evaluation Board settings. The default view is
a high-level functional mapping of settings. The second view is a lower-level register map view for program-
ming at the bit level. Each view is synchronized with the other view, so that changing a setting at one level
will also change the corresponding setting in the alternate level.
DS625DB1
5
5 Page 
CDB5364
4.5 Power Supply Circuitry
Power is applied to the evaluation board through five binding posts (+5 V, +12 V, -12 V, VA and GND). The
GND connection is the common reference for power supplies. The +5 V binding post supplies digital power
for all logic devices. The +12 V and -12 V binding posts supply power for the Operational Amplifier input
buffers. The VA binding posts supplies power to the Analog Reference.
4.6 Grounding and Power Supply Treatment
As a high-peformance mixed-signal device, the CS5364 requires careful attention to power and grounding
arrangements to optimize CS5364 performance. The CDB5364 Evaluation Board provides an excellent ref-
erence example of an optimum two-layer board layout that places decoupling capacitors as close to the
CS5364 as possible and provides ground plane fill on both top and bottom layers.
4.7 FPGA Hardware
The on-board FPGA is utilized for several purposes. In addition to providing a method for configuring the
CS5364 in Software mode, it contains its own configuration registers that provide clock and data routing for
Master and Slave modes of the CS5364. The FPGA contains a multiplexer that selects which SDOUT line
is routed to the CS8406. It also contains a TDM2PCM engine that extracts channel pairs from a TDM stream
and sends them to the CS8406.
4.8 CS8406 S/PDIF Audio Transmitter
The system generates standard S/PDIF data using a CS8406 192 kHz Digital Audio Transmitter. The
CS8406 receives input data from the FPGA in PCM format and transmits S/PDIF data on both optical and
coaxial output connectors. The optical output connector is limited to a maximum speed of 96 kHz. The co-
axial connector supports Quad Speed 192 kHz clocking rates.
4.9 Serial Audio Interface
In addition to the standard S/PDIF outputs, the Customer Evaluation Board has been designed to allow
Master and Slave operation using the Serial Audio Interface (SAI) via the 14-pin header, J4, which includes
the signals MCLK, SCLK, LRCK, and the four serial data lines.
When the CS5364 is in Slave mode, SCLK and LRCK/FS must be supplied externally through the J4 head-
er.
4.10 Analog Input Buffer
The CDB5364 includes an example of an active low-noise, single-ended-to-differential analog input buffer
shown in the schematic drawings, Figures 10 and 11. Alternate active or passive, single-ended or differen-
tial topologies may be used as cost dictates. However, the high performance of the CS5364 may be com-
promised. Optimum device performance is met by buffering the CS5364 with a low noise structure that is
stable with a 2700 pF output load.
DS625DB1
11
11 Page | ||
| Páginas | Total 24 Páginas | |
| PDF Descargar | [ Datasheet CDB5364.PDF ] | |
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