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PDF KL5KUSB111 Data sheet ( Hoja de datos )
| Número de pieza | KL5KUSB111 | |
| Descripción | USB to HomePNA | |
| Fabricantes | Kawasaki | |
| Logotipo |  |
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KL5KUSB111
General Description
USB to HomePNA
The Kawasaki KL5KUSB111 Controller is a unique single chip solution developed to interface the Universal Serial
Bus (USB) to HomePNA-Networks and standard 10base-T Networks. The KL5KUSB111 has been specifically
designed to provide a simple solution to communicate with Home Networking Applications at 1 Mb/s and/or 10 Mb/s
Ethernet. By utilizing the Kawasaki's USB to Ethernet technology that has been used throughout the industry. The
USB controller consists of a central 16-bit processor, mask ROM, RAM buffer, clock generator, HomePNA /
Ethernet interface, UART, IRQ, Watchdog Timer, Serial interface, External Memory Interface and Debug UART.
The SIE (Serial Interface Engine) is fully compatible with the USB specification. The Kawasaki USB to HomePNA
controller enables the advantages of Home Networking such as Shared Internet access, Printer/peripheral
sharing, File and application sharing and Networked gaming.
Features
• Advanced 16 Bit processor for USB transaction
processing and control data processing
• USB interface ver. 1.0/1.1 compliant
• Integrated Transceivers and SIE (Serial Interface
Engine)
• Internal Clock Generation
• Utilizes low cost external crystal circuitry
• 1.5K x 16 Internal RAM buffer
• Serial Interface for external EEPROM
• HomePNA compliant for 1Mb/sec.
• Fully IEEE 802.3 compliant 10 Mbit/sec
Ethernet MAC Layer. Interfaces serially of
an external ENDEC PHY.
• Debug UART
• External memory interface
• Compatible with most HomePNA PHY's
• Watchdog timer
• 100 pin LQFP package
Block Diagram
Txd
Rxd UART
CK EEPROM
Serial Interface
DIO
2
INT 1-0
IRQ
8 1Mb/s PNA
and/or 10Mb/s
Ethernet
Timer 0
Timer 1
RAM
(3KB)
Mask ROM
(8KB)
16 Bit
Processor
Watchdog
Timer
SRAM Interface
16 Bit Address / Data Bus
Serial
Interface
Engine
PLL & Clock
Generator
USB Interface
Data -
Data +
A15-0
D15-0
Cntrl .
X1
X2
Kawasaki LSI • 2570 North First Street • Suite 301 • San Jose, CA 95131 • Tel: (408) 570-0555 • Fax: (408) 570-0567 • www.klsi.com
Ver. 2.3
1
1 page  
KL5KUSB111
Pin #
LQFP
93
94
95
96
97
98
99
100
I/O
IN/OUT
IN
IN/OUT
IN/OUT
IN
IN/OUT
IN/OUT
IN
Pin Name
XD_11
IGND
XD_12
XD_13
OGND
XD_14
XD_15
VDD
External Data Pin
GND
External Data Pin
External Data Pin
GND
External Data Pin
External Data Pin
VDD
USB to HomePNA
Description
Function Description
16 Bit Processor
The integrated 16 bit processor serves as a micro controller for USB peripherals. The processor
can execute approximately five million instructions per second. With this processing power it
allows the design of intelligent peripherals that can process data prior to passing it on to the host
PC, thus improving overall performance of the system. The masked ROM (4K X 16) in the
KL5KUSB111 or external memory contains a specialized instruction set that has been designed
for highly efficient coding of processing algorithms and USB transaction processing.
The 16-bit processor is designed for efficient data execution by having direct access to the RAM
Buffer, external memory, I/O interfaces, and all the control and status registers. The
divide/multiply feature expands the capability of USB peripherals.
The processor supports prioritized vectored hardware interrupts. In addition, as many as 240
software interrupt vectors are available.
The processor provides six addressing modes, supporting memory-to-memory, memory-to-
register, register-to-register, immediate-to-register or immediate-to-memory operations. Register,
direct, immediate, indirect, and indirect indexed addressing modes are supported. In addition,
there is an auto-increment mode in which a register, used as an address pointer is automatically
incremented after each use, making repetitive operations more efficient both from a programming
and a performance standpoint.
The processor features a full set of program control, logical, and integer arithmetic instructions. All
instructions are sixteen bits wide, although some instructions require operands, which may occupy
another one or two words. Several special “ short immediate” instructions are available, so that
certain frequently used operations with small constant operand will fit into a 16-bit instruction.
The Processor – Divide/Multiply function
The processor’s divide/multiply function contains all the instructions of the base processor that
additionally includes integer divide and multiply instructions. A signed multiply instruction takes
two 16-bit operands and returns a 32-bit result. A signed divide instruction divides a 32-bit
operand by a 16-bit operand.
Kawasaki LSI • 2570 North First Street • Suite 301 • San Jose, CA 95131 • Tel: (408) 570-0555 • Fax: (408) 570-0567 • www.klsi.com
Ver. 2.3
5
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet KL5KUSB111.PDF ] | |
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