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PDF P89LPC9401 Data sheet ( Hoja de datos )

Número de pieza P89LPC9401
Descripción 8-bit microcontroller
Fabricantes NXP Semiconductors 
Logotipo NXP Semiconductors Logotipo



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P89LPC9401
8-bit microcontroller with accelerated two-clock 80C51 core
8 kB 3 V byte-erasable flash with 32 segment × 4 LCD driver
Rev. 01 — 5 September 2005
Preliminary data sheet
1. General description
The P89LPC9401 is a multi-chip module consisting of a P89LPC931 single-chip
microcontroller combined with a PCF8576D universal LCD driver in a low-cost 64-pin
package. The LCD driver provides 32 segments and supports from 1 to 4 backplanes.
Display overhead is minimized by an on-chip display RAM with auto-increment
addressing.
2. Features
2.1 Principal features
s 8 kB byte-erasable flash code memory organized into 1 kB sectors and 64-byte pages.
Single-byte erasing allows any byte(s) to be used as non-volatile data storage.
s 256-byte RAM data memory.
s 32 segment × 4 backplane LCD controller supports from 1 to 4 backplanes.
s Two analog comparators with selectable inputs and reference source.
s Two 16-bit counter/timers (each may be configured to toggle a port output upon timer
overflow or to become a PWM output) and a 23-bit system timer that can also be used
as a Real-Time Clock (RTC).
s Enhanced UART with fractional baud rate generator, break detect, framing error
detection, and automatic address detection; 400 kHz byte-wide I2C-bus
communication port and SPI communication port.
s High-accuracy internal RC oscillator option allows operation without external oscillator
components. The RC oscillator option is selectable and fine tunable.
s 2.4 V to 3.6 V VDD operating range. I/O pins are 5 V tolerant (may be pulled up or
driven to 5.5 V).
s 64-pin LQFP package with 20 microcontroller I/O pins minimum and up to 23
microcontroller I/O pins while using on-chip oscillator and reset options.
s Serial flash In-Circuit Programming (ICP) allows simple production coding with
commercial EPROM programmers. Flash security bits prevent reading of sensitive
application programs.
2.2 Additional features
s A high performance 80C51 CPU provides instruction cycle times of 111 ns to 222 ns
for all instructions except multiply and divide when executing at 18 MHz. This is six
times the performance of the standard 80C51 running at the same clock frequency. A
lower clock frequency for the same performance results in power savings and reduced
EMI.

1 page




P89LPC9401 pdf
Philips Semiconductors
P89LPC9401
8-bit two-clock 80C51 microcontroller with 32 segment × 4 LCD driver
P89LPC931
ACCELERATED 2-CLOCK 80C51 CPU
P3[1:0]
P2.5, P2[3:0]
P1[7:0]
P0[7:0]
CRYSTAL
OR
RESONATOR
X1
X2
8 kB CODE FLASH
256-BYTE
DATA RAM
internal bus
PORT 3
CONFIGURABLE I/Os
PORT 2
CONFIGURABLE I/Os
PORT 1
CONFIGURABLE I/Os
PORT 0
CONFIGURABLE I/Os
KEYPAD
INTERRUPT
WATCHDOG TIMER
AND OSCILLATOR
PROGRAMMABLE
OSCILLATOR DIVIDER
CPU
clock
CONFIGURABLE
OSCILLATOR
ON-CHIP
RC
OSCILLATOR
Fig 2. Microcontroller section block diagram
UART
I2C-BUS
SPI
REAL-TIME CLOCK/
SYSTEM TIMER
TIMER 0
TIMER 1
ANALOG
COMPARATORS
TXD
RXD
SCL
SDA
SPICLK
MOSI
MISO
T0
T1
CMP2
CIN2B
CIN2A
CMP1
CIN1A
CIN1B
POWER MONITOR
(POWER-ON RESET,
BROWNOUT RESET)
002aab461
P89LPC9401_1
Preliminary data sheet
Rev. 01 — 5 September 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
5 of 59

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P89LPC9401 arduino
Philips Semiconductors
P89LPC9401
8-bit two-clock 80C51 microcontroller with 32 segment × 4 LCD driver
7. Functional description
Remark: Please refer to the P89LPC9401 User manual for a more detailed functional
description.
7.1 Special function registers
Remark: Special Function Registers (SFRs) accesses are restricted in the following
ways:
User must not attempt to access any SFR locations not defined.
Accesses to any defined SFR locations must be strictly for the functions for the SFRs.
SFR bits labeled ‘-’, logic 0 or logic 1 can only be written and read as follows:
‘-’ Unless otherwise specified, must be written with logic 0, but can return any
value when read (even if it was written with logic 0). It is a reserved bit and may be
used in future derivatives.
Logic 0 must be written with logic 0, and will return a logic 0 when read.
Logic 1 must be written with logic 1, and will return a logic 1 when read.
P89LPC9401_1
Preliminary data sheet
Rev. 01 — 5 September 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
11 of 59

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