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PDF GTL2007 Data sheet ( Hoja de datos )
| Número de pieza | GTL2007 | |
| Descripción | 13-bit GTL to LVTTL translator | |
| Fabricantes | NXP Semiconductors | |
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GTL2007
13-bit GTL to LVTTL translator with power good control
Rev. 01 — 2 June 2005
Product data sheet
1. General description
The GTL2007 is a customized translator between dual Xeon processors, Platform Health
Management, South Bridge and Power Supply LVTTL and GTL signals.
The GTL2007 is derived from the GTL2006 with an enable function added that disables
the error output to the monitoring agent for platforms that monitor the individual error
conditions from each processor. This enable function can be used so that false error
conditions are not passed to the monitoring agent when the system is unexpectedly
powered down. This unexpected power-down could be from a power supply overload, a
CPU thermal trip, or some other event of which the monitoring agent is unaware.
A typical implementation would be to connect each enable line to the system power good
signal or the individual enables to the VRD power good for each processor.
The Nocona and Dempsey/Blackford Xeon processors specify a VTT of 1.2 V and 1.1 V,
as well as a nominal Vref of 0.76 V and 0.73 V respectively. To allow for future voltage level
changes that may extend Vref to 0.63 of VTT (minimum of 0.693 V with VTT of 1.1 V) the
GTL2009 allows a minimum Vref of 0.66 V. Characterization results show that there is little
DC or AC performance variation between these levels.
The GTL2007 is the companion chip to the GTL2009 3-bit GTL Front-Side Bus frequency
comparator that is used in dual-processor Xeon applications.
2. Features
s Operates as a GTL to LVTTL sampling receiver or LVTTL to GTL driver
s 3.0 V to 3.6 V operation
s LVTTL I/O not 5 V tolerant
s Series termination on the LVTTL outputs of 30 Ω
s ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per
JESD22-A115, and 1000 V CDM per JESD22-C101
s Latch-up testing is done to JEDEC Standard JESD78 which exceeds 500 mA
s Package offered: TSSOP28
1 page  
Philips Semiconductors
GTL2007
13-bit GTL to LVTTL translator with power good control
Table 3:
Symbol
6BI
5BI
11BO
EN2
7BO2
7BO1
2BI
1BI
VCC
Pin description …continued
Pin Description
20 data input (GTL)
21 data input (GTL)
22 data output (GTL)
23 enable input (LVTTL)
24 data output (GTL)
25 data output (GTL)
26 data input (GTL)
27 data input (GTL)
28 positive supply voltage
7. Functional description
Refer to Figure 1 “Logic diagram of GTL2007” on page 3.
7.1 Function tables
Table 4: GTL input signals
H = HIGH voltage level; L = LOW voltage level.
Input
1BI/2BI/3BI/4BI/9BI
L
H
Output [1]
1AO/2AO/3AO/4AO/9AO
L
H
[1] 1AO, 2AO, 3AO, 4AO and 5A/6A condition changed by ENn power good signal as described in Table 5 and
Table 6.
Table 5: EN1 power good signal
H = HIGH voltage level; L = LOW voltage level.
EN1 1AO and 2AO
LH
H follows BI
5A
5BI disconnected
5BI connected
Table 6: EN2 power good signal
H = HIGH voltage level; L = LOW voltage level.
EN2 3AO and 4AO
LH
H follows BI
6A
6BI disconnected
6BI connected
9397 750 13264
Product data sheet
Rev. 01 — 2 June 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
5 of 19
5 Page 
Philips Semiconductors
GTL2007
13-bit GTL to LVTTL translator with power good control
Table 13: Dynamic characteristics …continued
VCC = 3.3 V ± 0.3 V
Symbol
Parameter
tPLH propagation delay,
tPHL EN1 to nAO or EN2 to nAO
tPLZ disable time from LOW level,
EN1 to 5A (I/O) or EN2 to 6A (I/O)
tPZL enable time to LOW level,
EN1 to 5A (I/O) or EN2 to 6A (I/O)
Conditions
see Figure 8
see Figure 9
Min
Typ [1]
Max
Unit
2
6.5 10
ns
2
6.5 10
ns
1 3 7 ns
2 7 10 ns
[1] All typical values are at VCC = 3.3 V and Tamb = 25 °C.
[2] Includes ~7.6 ns RC rise time of test load pull-up on 11A, 1.5 kΩ pull-up and 21 pF load on 11A has about 23 ns RC rise time.
12.1 Waveforms
VM = 1.5 V at VCC ≥ 3.0 V for A ports; VM = Vref for B ports.
tpulse
VM
VH
VM
0V
002aaa999
VM = 3.0 V for A port and VTT for B port
a. Pulse duration
Fig 4. Voltage waveforms
input
output
1.5 V
tPLH
Vref
3.0 V
1.5 V
0V
tPHL
VOH
Vref
VOL
002aab000
A port to B port
b. Propagation delay times
9397 750 13264
Product data sheet
Rev. 01 — 2 June 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
11 of 19
11 Page | ||
| Páginas | Total 19 Páginas | |
| PDF Descargar | [ Datasheet GTL2007.PDF ] | |
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