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PDF NCP9004 Data sheet ( Hoja de datos )

Número de pieza NCP9004
Descripción Filterless Class-D Audio Power Amplifier
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No Preview Available ! NCP9004 Hoja de datos, Descripción, Manual

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NCP9004
2.65 W Filterless Class−D
Audio Power Amplifier
The NCP9004 is a costeffective mono ClassD audio power
amplifier capable of delivering 2.65 W of continuous average power
to 4.0 W from a 5.0 V supply in a Bridge Tied Load (BTL)
configuration. Under the same conditions, the output power stage can
provide 1.4 W to a 8.0 W BTL load with less than 1% THD+N. For
cellular handsets or PDAs it offers space and cost savings because no
output filter is required when using inductive tranducers. With more
than 90% efficiency and very low shutdown current, it increases the
lifetime of your battery and drastically lowers the junction
temperature.
The NCP9004 processes analog inputs with a pulse width
modulation technique that lowers output noise and THD when
compared to a conventional sigmadelta modulator. The device allows
independent gain while summing signals from various audio sources.
Thus, in cellular handsets, the earpiece, the loudspeaker and even the
melody ringer can be driven with a single NCP9004. Due to its low
42 mV noise floor, Aweighted, a clean listening is guaranteed no
matter the load sensitivity.
Features
Optimized PWM Output Stage: Filterless Capability
Efficiency up to 90%
Low 2.5 mA Typical Quiescent Current
Large Output Power Capability: 1.4 W with 8.0 W Load and
THD+N < 1%
Wide Supply Voltage Range: 2.55.5 V Operating Voltage
High Performance, THD+N of 0.03% @ Vp = 5.0 V,
RL = 8.0 W, Pout = 100 mW
Excellent PSRR (65 dB): No Need for Voltage Regulation
Surface Mounted Package 9Pin FlipChip CSP (SnPb and PbFree)
Fully Differential Design. Eliminates Two Input Coupling Capacitors
Very Fast Turn On/Off Times with Advanced Rising and Falling
Gain Technique
External Gain Configuration Capability
Internally Generated 250 kHz Switching Frequency
Short Circuit Protection Circuitry
“Pop and Click” Noise Protection Circuitry
Applications
Cellular Phone
Portable Electronic Devices
PDAs and Smart Phones
Portable Computer
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MARKING
DIAGRAM
9PIN FLIPCHIP CSP
FC SUFFIX
1 CASE 499E
MAQG
AYWW
1
MAQ = Device Code
A = Assembly Location
Y = Year
WW = Work Week
G = PbFree Package
PIN CONNECTIONS
9Pin FlipChip CSP
A1 A2 A3
INP GND OUTM
B1 B2 B3
VP VP GND
C1 C2 C3
INM SD OUTP
(Top View)
ORDERING INFORMATION
See detailed ordering and shipping information on page 16 of
this data sheet.
Cs
Audio
Input
from
DAC
Ri
Ri
Input from
Microcontroller
INP VP
INM
SD
OUTM
OUTP
Ri
1.6 mm
Ri
GND
Cs
3.7 mm
Solution Size
© Semiconductor Components Industries, LLC, 2006
August, 2006 Rev. 2
1
Publication Order Number:
NCP9004/D

1 page




NCP9004 pdf
NCP9004
ELECTRICAL CHARACTERISTICS (Limits apply for TA = +25°C unless otherwise noted)
Symbol
Characteristic
Conditions
Min Typ Max Unit
Efficiency
RL = 8.0 W, f = 1.0 kHz
Vp = 5.0 V, Pout = 1.2 W
Vp = 3.6 V, Pout = 0.6 W
%
91
90
THD+N Total Harmonic Distortion + Noise
CMRR Common Mode Rejection Ratio
RL = 4.0 W, f = 1.0 kHz
Vp = 5.0 V, Pout = 2.0 W
Vp = 3.6 V, Pout = 1.0 W
Vp = 5.0 V, RL = 8.0 W,
f = 1.0 kHz, Pout = 0.25 W
Vp = 3.6 V, RL = 8.0 W,
f = 1.0 kHz, Pout = 0.25 W
Vp from 2.5 V to 5.5 V
Vic = 0.5 V to Vp 0.8 V
Vp = 3.6 V, Vic = 1.0 Vpp
f = 217 Hz
f = 1.0 kHz
82
81
0.05
0.09
− −62
− −56
− −57
%
%
dB
PSRR Power Supply Rejection Ratio
Vp_ripple_pkpk = 200 mV, RL = 8.0 W,
Inputs AC Grounded
Vp = 3.6 V
f = 217 kHz
f = 1.0 kHz
− −62
− −65
dB
Audio Input
Signal
+
Ci
Ci
Ri
Ri
Power
Supply
+
NCP9004
INP OUTM
INM OUTP
VP GND
4.7 mF
Load
30 kHz
Low Pass
Filter
+
Measurement
Input
Figure 2. Test Setup for Graphs
NOTES:
1. Unless otherwise noted, Ci = 100 nF and Ri= 150 kW. Thus, the gain setting is 2 V/V and the cutoff frequency of the
input high pass filter is set to 10 Hz. Input capacitors are shorted for CMRR measurements.
2. To closely reproduce a real application case, all measurements are performed using the following loads:
RL = 8 W means Load = 15 mH + 8 W + 15 mH
RL = 4 W means Load = 15 mH + 4 W + 15 mH
Very low DCR 15 mH inductors (50 mW) have been used for the following graphs. Thus, the electrical load
measurements are performed on the resistor (8 W or 4 W) in differential mode.
3. For Efficiency measurements, the optional 30 kHz filter is used. An RC lowpass filter is selected with
(100 W, 47 nF) on each PWM output.
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NCP9004 arduino
11
10
9
8
7
6
2.5
TA = +85°C
TA = +25°C
TA = 40°C
3.5 4.5
POWER SUPPLY (V)
Figure 33. Turn on Time
NCP9004
8
7
TA = +25°C
6 TA = 40°C
5 TA = +85°C
5.5 42.5
3.5 4.5
POWER SUPPLY (V)
Figure 34. Turn off Time
5.5
Turn on time
Output
differential
voltage
Output
differential
voltage
Shutdown signal
0 2 4 6 8 10 12 14 16 18 20
(ms)
Figure 35. Turn on sequence
Vp = 3.6 V, RL = 8 W
Turn off
time
Shutdown
signal
0 1 2 3 4 5 6 7 8 9 10
(ms)
Figure 36. Turn off sequence
Vp = 3.6 V, RL = 8 W
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