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PDF NCP4326 Data sheet ( Hoja de datos )
| Número de pieza | NCP4326 | |
| Descripción | Secondary Controller | |
| Fabricantes | ON Semiconductor | |
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NCP4326
Secondary Controller for
Multi−Output
Quasi−Resonant
Switchmode Power
Supplies
This secondary controller significantly improves the overall
efficiency and cross−regulation figures when used in a Switchmode
Power Supply. Compared to traditional regulation schemes, the
NCP4326 provides superior performance in cross−regulation by
individually regulating outputs. Powered from a main winding, the
device actuates two independent switches that precisely adjust the
considered outputs to resistor−selectable voltages. This controller also
integrates a precision reference voltage, which together with a
dedicated operational amplifier reduces the feedback loop elements to
the minimum. In the end three independent output voltages can be
controlled by a single device.
A skip cycle feature improves the stand by power in light load
condition. Finally, dedicated shutdown pins offer an easy mean to
disable the secondary outputs in applications where a low standby
power performance is key.
Features
• 0% to 100% Duty Cycle Range
• Integrated Shunt Regulator for Optocoupler Control
• Internal Voltage Reference (1.25 V, 1% @ 25°C)
• 2 Independent Power MOSFET Drivers
• Enable/Disable for Each Driver
• Independent Soft−Starts on both Output Drivers
• Independent Skip Cycle on both Output Drivers
• Standby Pin
• 580 / 650 mA Peak Current Source/Sink Driver Capability
• Synchronization Pin
• 5 V Undervoltage Lock−Out on Vcc
• Pb−Free Package is Available
Applications
• Consumer Electronics Applications:
DVD, Set Top Box, CDR, Game Console
• Any Multi−Output Voltage Quasi−Resonant SMPS
http://onsemi.com
MARKING DIAGRAM
SOIC−16
D SUFFIX
CASE 751B
NCP4326DG
AWLYWW
1
A = Assembly Location
WL = Wafer Lot
Y = Year
WW = Work Week
G = Pb−Free Device
PIN CONNECTIONS
CP1 1
FB1 2
EN2 3
CP2 4
FB2 5
Ct 6
Sync 7
CPm 8
16 EN1
15 GND
14 Flux
13 DRV1
12 Vcc
11 DRV2
10 STBY
9 FBm
(Bottom View)
ORDERING INFORMATION
Device
Package
Shipping{
NCP4326DR2
SOIC−16 3000 Tape & Reel
NCP4326DR2G SOIC−16 3000 Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2005
September, 2005 − Rev. 1
1
Publication Order Number:
NCP4326/D
1 page  
NCP4326
12 VCC
VDD1* VDD**
VCC Vcc OK
UVLO VCC
STBY
VOLTAGE
REFERENCE
*VDD1 is not available in standby mode
**VDD is available all the time
2V5
1V25
EN1 16
1 CP1
2 FB1
Vcc OK
1V25
4 CP2
5 FB2
VDD
CHANNEL 1
STBY
CHANNEL 2
VDD1
+
−
GND
DRV1 13
VDD1
STBY 10
2V5
DRV 11
6 Ct
7 Sync
ICt
VDD
−
+
GND
9 FBm
8 CPm
GND
VDD1
−
+
GND
Ctramp
Enable or
Int_sync
4V0
1V6
4V5
GND
GND
GND
OPAMP with
Open Collector Output
1V25
EN2 3
Int_Flux
GND
Offset
0V5
VDD
+
−
Clamp
0V 1V
GND
8.5R
R
GND 15
Flux 14
GND
CHANNEL x
Vcc OK
CPx
FBx
1V25
Ctramp
Int_Sync
VDD
−
+
GND
VDD
+
−
GND
LOGIC
LATCH
Int_Flux
VDD
IENx
ENx
VDD
5V0
GND GND
VCC
DRVx
GND
STBY
Figure 3. Internal Circuit Architecture
http://onsemi.com
5
5 Page 
NCP4326
Sync Pin
Ct Pin
VCt_max1
VCt_min
Time
TCt_disch
VCt_min*1.05
Time
Sync Pin
DRVx
Figure 7. Discharging Time Definition (Ct Pin)
Sync Pin
Voltage on Ct Pin
Tprop_ON
Vcc/2
1.6V
Time
DRVx
Time
CPX
Time
Tprop_OFF
Vcc/2
Time
Figure 8. Tprop_ON and Tprop_OFF Propagation Delay Definition (in Normal Mode Operation)
Vsync
0
nl
np
Vin
VCt
VEA
Vo
2Vo
4.0 V
t
1.5 V
Drv
t
0
Is1 Tprop_ONIs1_pk
Tprop_OFF
0
Is2
Is2_pk
0
D blocks flyback stroke
Ts
t
t
t
Figure 9. Tprop_ON and Tprop_OFF Timing Position in the Timing Application Diagram (in Normal Mode Operation)
http://onsemi.com
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet NCP4326.PDF ] | |
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