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PDF VS6552 Data sheet ( Hoja de datos )

Número de pieza VS6552
Descripción VGA Color CMOS Image Sensor Module
Fabricantes ST Microelectronics 
Logotipo ST Microelectronics Logotipo



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VS6552
VGA Color CMOS Image Sensor Module
FEATURES
Small physical size
Ultra low power standby mode
SmOP (Small Optical Package) technology
featuring integrated lens
Class leading low light performance
VGA resolution sensor
Compatible with STV0974 companion mobile
processor
High frame rate to minimize image distortion
Low EMI link (VisionLink) to STV0974
On-chip 10-bit ADC
Automatic dark calibration
I2C communications
On-chip PLL
DESCRIPTION
The VS6552 is a VGA resolution SmOP sensor
module. SmOP technology combines the image
sensor and fixed focus lens system in a single
module. This approach provides a number of ad-
vantages:
– SmOP technology is suitable for high volume
manufacturing
– SmOP can be plugged into a PCB mounted
flow soldered socket
– SmOP can be mounted close to noisy RF
source as differential signalling used to
transmit data has good immunity from radio
interference.
The sensor outputs raw Bayer colorized data to
the STV0974 companion mobile processor.
STV0974 then performs all color processing and
exposure control functions before outputting the
data in an appropriate interface format like YCbCr,
RGB or JPEG.
VS6552 offers an ultra low power standby mode
that consumes less than 15 µW.
The SmOP lens has been designed to combine
class leading low light performance with good
depth of field to ensure excellent overall optical
performance. The lens is a 2 element moulded
plastic design.
The output data and qualification clock are trans-
mitted over low noise, low voltage and fully differ-
ential links. VS6552 configuration registers are
controlled via a private I2C interface to STV0974.
APPLICATIONS
Mobile phone embedded camera system
PDA embedded camera or accessory camera
Wireless security camera
Table 1. Technical Specifications
Pixel resolution
644 x 484 (VGA)
Pixel size
5.6 µm x 5.6 µm
Exposure control
+81 dB
Analog gain
+24 dB (max)
Dynamic range
60 dB (Typical)
Signal to noise at
50cd.m2
37 dB (Typical)
Supply voltage
2.8 V (analog supply)
1.8 V (digital supply)
Power consumption
<75 mW (@30 frame/s)
<15 µW (standby mode)
Package size
10.7mm x 8.7mm x
6mm:SmOP1.5
9.5mm x 8.5mm x 6.1mm
:SmOP2
Lens
45o HFOV, f# 2.8
Package type
14 pad SmOP
System attach
Socket or flexible circuit
October 2004
Rev. 2
1/26

1 page




VS6552 pdf
VS6552
2 SIGNAL DESCRIPTION
Table 3. Signal Description
Pad Number
Pad Name
Power supplies
I/O Type
Description
1 CEXT
PWR
Connection to capacitora
2
3
8
11
System
AGND
AVDD
GND
VDD
PWR
PWR
PWR
PWR
Analog ground
Analog power
Digital ground
Digital power
4
5
Control
6
7
Data
PDN
CLK
MSCL
MSDA
I
I
I
I/O
Power down controlb
System clock input
Serial communication clock
Serial communication data
9
10
12
13
Not connected
14
NC
PCLKN
PCLKP
PDATAN
PDATAP
Not connected
Not connected
vLVDS output
vLVDS output
vLVDS output
vLVDS output
Output qualifying clock
Output qualifying clock
Serial output data
Serial output data
a.Internally generated voltage that needs to be externally decoupled with a 100 nF, 5 V capacitor
b.Signal is active low
Note: The physical position of the signals on the package can be found by refering to the pinout information in Chapter 7: Package Mechan-
ical Data.
5/26

5 Page





VS6552 arduino
VS6552
Symbol
Parameter description
Min.
fCLK Clock frequency inputa
6.5 - 1%a
a.Nominal frequencies are 6.5 to 26MHz with a 1% center frequency tolerance
Typ.
-
Max.
26 + 1%b
Table 12. Timing Characteristics
Symbol
Parameter description
Min.
tMSCL
tLOW
tHIGH
tSP
MSCL clock frequency
Clock pulse width low
Clock pulse width high
Pulse width of spikes which are suppressed
by the input filter
0
1.3
0.6
0
tBUF
tHD.STA
tSU.STA
tHD.DAT
tSU.DAT
tR
tF
tSU.STO
Ci/o
Bus free time between transmissions
Start hold time
Start set-up time
Data in hold time
Data in set-up time
MSCL/MSDA rise time
MSCL/MSDA fall time
Stop set-up time
Input / Output capacitance (MSDA)
1.3
0.6
0.6
0
100
20+0.1Cba
20+0.1 Cb
0.6
Cin Input capacitance (MSCL)
a.Cb = total capacitance on the lines
Max.
400
50
0.9
300
300
8
6
Unit
kHz
µs
µs
ns
µs
µs
µs
µs
ns
ns
ns
µs
pF
pF
Figure 4. CCI AC characteristics
stop start
start stop
MSDA
...
Unit
MHz
tBUF
tLOW tR
tF
tHD.STA
MSCL
...
tHD.STA
tHD.DAT tHIGH tSU.DAT
tSU.STA tSU.STO
Note: The VS6552 maximum I2C frequency of 400 kHz is only valid for external clock frequencies at or above 19.2 MHz. Due to a design
issue, for external clock frequencies below 19.2MHz, the maximum guaranteed I2C frequency is limited to 200 kHz.
11/26

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