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PDF VS6502 Data sheet ( Hoja de datos )

Número de pieza VS6502
Descripción VGA Color CMOS Image Sensor Module
Fabricantes ST Microelectronics 
Logotipo ST Microelectronics Logotipo



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VS6502
VGA Color CMOS Image Sensor Module
Features
Small physical size: integrated lens in a
SmOP (Small Optical Package)
640 x 480 VGA resolution
Up to 30 frame/s VGA, 60 frame/s QVGA
On-chip 10-bit ADC
Automatic dark calibration
2.6 V to 3.6 V power supply
I2C communications
Low power suspend mode
4 or 5 wire nibble output
Socket available separately
Description
The VS6502 is a VGA resolution SmOP sensor
module. SmOP technology combines the image
sensor and fixed focus lens system in a single
module. The SmOP sensor module is connected to
the PCB either via a socket or flex option. The
socket allows the PCB to use standard reflow
soldering techniques.
The sensor outputs 10-bit raw digital image data
which directly interface to a range of
STMicroelectronics companion processors via 4/5
wire interface.
An I2C interface allows the processor to configure
the device and control exposure and gain settings.
There are three different digital video output
formats:
VGA mode - 640 x 480 image size
Sub-sampled QVGA mode - 320 x 240 image
size
Window Of Interest QVGA mode - 320 x 240
pixel
Applications
Miniature USB web cameras
(STV0676 - STV0674)
Embedded cameras (STV0676 - STV0674):
Handhelds, Cell phones, Network cameras
Digital stills cameras (STV0674):
Minicam, miniature USB flash drive cameras
Digital video cameras (STV0674)
Technical Specifications
Pixel resolution
Pixel size
Array size
Dynamic range
Analogue gain
Sensitivity (typical)
Signal/Noise ratio
Supply voltage
Power consumption
Operating temperature
Package size
Lens
Package type
644 x 484 (VGA)
5.6 µm x 5.6 µm
3.6 mm x 2.7 mm
> 52 dB
0 to 24dB
2.05 V / lux-s
+ 37 dB
2.6 to 3.6 V
Active (30 frame/s) < 30 mA
Suspend (no clk) < 10 µA
0 to 40°C
10.6 mm x 8.7 mm x 5.8 mm
47° HFOV, f#2.8
14 pad SmOP
Ordering information
Ordering code
VS6502V015
XS0015/TR
Description
VS6502 sensor module
Socket for sensor module
July 2004
1/48

1 page




VS6502 pdf
VS6502
Overview
1.2 Typical applications
USB camera with STV0674 or STV0676
This is a USB video camera where the co-processor supplies the sensor clock CLKIN and uses the
embedded control sequences to synchronize with the frame and line level timings.
Figure 2: Overview of USB camera using the VS6502
Co-processor
D[4:0]
CLKIN
SDA/SCL
VS6502
The USB input supply is 5 V. In the application, a regulator must deliver 3.3 V to both the co-
processor and sensor analogue and digital blocks.
Figure 3: USB camera using STV0676/STV0674
SDA/SCL
USB
coprocessor
ASIC
D+ D-
SUSPEND
CHIPEND
SDAA
CLKIN 0 VS6502
SCLG
image sensor
N
D4 -QCLDK
NC
D
D3 1
AVDD
C
D2 D
AGNDH
2
D1
DVDDI
D
D0
P
DGND
E
1V8
USB USB data
port
USB main supply
3V3
REG 5V to 3.3V
5/48

5 Page





VS6502 arduino
VS6502
Functional Description
Frame-level position of QCLK signal
QCLK can operate in 2 different modes, selectable using register [20]
Free running: in this mode, QCLK is runs continuously
Active only: in this mode QCLK only qualifies the visible lines
2.3.2
Line format
The line format is shown in Figure 11. Each line starts with a Start of Active Video (SAV) sequence
which consists of an escape sequence (FF-FF-00) followed by a single byte line code that identifies
the line type and then two bytes containing the line number (with parity bits).
The line number format is shown in Figure 12 and the line codes are described in Section 2.3.3.
Each line is terminated with an End of Active Video (EAV) sequence consisting of an escape
sequence followed by the End of Line (EOL) code followed by the average value of the pixels on
that line (repeated).
Following the EAV sequence there is a blanking period where the data is 0xFF. The length of this
interline blanking period is shown in Table 3 on page 12.
Figure 11: Line format
Start of Active Video (SAV)
Escape sequence Line Line
(FF-FF-00) code number
Line period
Video data
End of Active Video (EAV)
SAV
Escape sequence
(FF-FF-00)
EAV
Code
PixAv PixAv Blanking
N pixels
1N
4-wire data bus
FH 0H
XH YH D3 D2 D1 D0 PM PL
PM PL
FH
0H 8H 0H D3 D2 D1 D0
FH
Figure 12: Line Number Data Format
Line Number [L11:L0] is split over 2 bytes
0 L11 L10 L9 L8 L7 L6 P 0 L5 L4 L3 L2 L1 L0 P
First Byte
Second Byte
Odd
word
parity
11/48

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