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PDF SCG9816 Data sheet ( Hoja de datos )
| Número de pieza | SCG9816 | |
| Descripción | 8-BIT MICROCONTROLLER | |
| Fabricantes | SCS | |
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SCG9816
8-BIT MICROCONTROLLER
SCG9816 Microcontroller Specification
FEATURE SUMMARY
Technology
− CMOS technology.
CPU
−
−
8-bit CPU core.
126 powerful and easy-to-use
instruction set.
Memory
− Internal ROM: 16K x 8
− Internal RAM: 128 x 8
− Memory is organized as 16K-byte
page.
I/O structure
− Memory mapped I/O structure.
Oscillation Frequency
− RC Oscillator for the main system
clock up to 4MHz, instruction cycle
~0.5us.
− Subsystem clock frequency of
32.768kHz for real time timer.
Power Down
− Stop mode (Stop oscillation)
Interrupts
− 2 timer interrupts.
− 1 real time interrupt.
− 1 external event interrupt.
− 1 software interrupt.
I/O ports
− 2 8-bit programmable I/O ports.
− 1 7-bit output port.
Timer
−
−
−
2 8-bit pre-scalar auto reload timers
which can be cascaded to form one
16-bit timer.
1 real time timer.
1 watch dog timer.
Operating Voltage
− 2.4V to 5.5V.
Score Concept Semiconductor Ltd.
1
Sept 2000
1 page  
SCG9816
8-BIT MICROCONTROLLER
Memory
Interrupt Mask Flag (I)
The flag will be set to 1 when entering an interrupt service routine. By that
time, all other interrupt events will be pending.
After exiting from the interrupt service routine, this interrupt mask flag will be
cleared to 0. Then interrupt handling will be resumed.
There are 16K bytes internal ROM with each page size is 16K bytes. Besides, an extra 64
bytes area is for interrupt vector addressing space. Regarding the instruction pointer, it is
organized as iPAGE:PC for instruction fetch.
Change of program flow between pages is by modifying the PAGE register and then followed
by executing a JMP or CALL instruction. These two instructions will load the PAGE register to
iPAGE and change the content in PC for long JMP or CALL instruction. It does not need to
change the PAGE register if it is a short JMP/CALL (JMP/CALL within page) because the
PAGE register is normally the same as the iPAGE register. To exit a subroutine, long or short
return type must be specified for long or short CALL respectively.
The microcontroller has 128 bytes internal RAM data storage of address $80-$FF. This area
includes stack frame and data memory. The stack frame is usually initialized at the highest
RAM address location, i.e. $FF.
Oscillation Circuits
Main system and subsystem oscillation circuitry generates the internal clock signal for the
CPU and other hardware timings. The main system clock uses the RC oscillation source. The
operating frequency is up to 4 MHz. This clock is for the CPU and the two timers.
The subsystem clock is for the real time signals. It uses 32.768 kHz crystal. It has to be tied to
a voltage level, either HIGH or LOW, if the real time timer and the watch dog timer are not
used.
Power Down
The microcontroller supports power down mode for saving power.
Executing a STOP instruction will stop the main system oscillation to save most of
microcontroller power.
Only an external interrupt will release the microcontroller from STOP mode.
Interrupts
The MICROCONTROLLER has 2 timer interrupts, one real time interrupt, one external event
interrupt and one software interrupt. When interrupt occurs, the content of PC, iPAGE and PS
are pushed onto the stack in sequence. And then, the corresponding interrupt vector is loaded
into iPAGE:PC. Upon executing a RTI instruction, the registers are popped out of the stack in
the reversed order.
The preference of interrupt priority is Timer 0 / RTC interrupt, Timer 1 interrupt and then
external interrupt.
Score Concept Semiconductor Ltd.
5
Sept 2000
5 Page 
SCG9816
8-BIT MICROCONTROLLER
Control Registers
Summary
Table 3. Summary of Control Registers
Hex
00H
01H
02H
03H
04H
05H
06H
07H
08H
09H
0AH
0BH
0CH
0DH
0EH
0FH
Mnemonic
P0DIR
-
P0RW
P1DIR
P1RW
P2W
-
-
-
TCONG
INTR
TFLAG
T0VAL
T1VAL
SPHEN
-
Control Registers Name
Port 0 Direction Control Register
(Reserved)
Port 0 Read/Write Port
Port 1 Direction Control Register
Port 1 Read/Write Port
Port 2 Output Port
(Reserved)
(Reserved)
(Reserved)
Timer Configuration Port
Interrupt Control Register
Timer Flag Status Register/Watch-dog Reset
Timer 0 Preset Value Register
Timer 1 Preset Value Register
D/A Output Control Register
(Reserved)
R/W
W
-
R/W
W
R/W
W
-
-
-
W
W
R/W
W
W
W
-
Descriptions
P0DIR and P1DIR
Bit 7 6 5 4 3 2 1 0
R/W W W W W W W W W
0 : Input mode
1 : Output mode
Figure 11. Port 0 and Port 1 Direction Control Registers
P0RW and P1RW
Bit 7 6 5 4 3 2 1 0
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Write to output latch.
Read from input pin. Read value of Output pin
will be the output latch value.
Figure 12. Port 0 and Port 1 Read/Write Port
Score Concept Semiconductor Ltd.
11
Sept 2000
11 Page | ||
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