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PDF IC62LV51216L Data sheet ( Hoja de datos )

Número de pieza IC62LV51216L
Descripción 512 K x 16 bit Low Voltage and Ultra Low Power CMOS Static RAM
Fabricantes ICSI 
Logotipo ICSI Logotipo



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IC62LV51216L
IC62LV51216LL
Document Title
512 K x 16 bit Low Voltage and Ultra Low Power CMOS Static RAM
Revision History
Revision No
0A
0B
History
Draft Date
Initial Draft
January 3,2002
1. Add CE2 pin for 48 pin TF-BGA
September 2,2002
2. Change for ICC: 35 mA to 30 mA for 55 ns Industrial product
30 mA to 25 mA for 70 ns Industrial product
25 mA to 20 mA for 100 ns Industrial product
30 mA to 25 mA for 55 ns Commerical product
25 mA to 20 mA for 70 ns Commerical product
20 mA to 15 mA for 100 ns Commerical product
3. Change for ISB2: 20 µA to 15 µA for Commerical product
4. Change for IDR: 15 µA to 20 µA for Commerical/L product
6 µA to 13 µA for Commerical/LL product
20 µA to 30 µA for Industrial/L product
9 µA to 23 µA for Industrial/LL product
0C
1. Revise typo for pin assignment H1 from NC to A18
January 22,2003
2. Change Truth Table of LB/UB control,CE1 and CE2 to "Don't care"
3. Change DC parameters for TSOP-2 package as follows
(1)VIH : 2.2V to 2.8V
(2)ISB1 : 0.2mA to 0.7mA for commercial product
0.3mA to 0.8mA for Industrial product
(3)ISB2 : 15µA to 20µA for commercial/LL product
25µA to 30µA for Industrial/LL product
(4)ICC : 25mA to 30mA for commercial/LL product
30mA to 35mA for Industrial/LL product
Remark
The attached datasheets are provided by ICSI. Integrated Circuit Solution Inc reserve the right to change the specifications and
products. ICSI will answer to your questions about device. If you have any questions, please contact the ICSI offices.
Integrated Circuit Solution Inc.
LPSR014-0C 1/22/2003
1

1 page




IC62LV51216L pdf
IC62LV51216L
IC62LV51216LL
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input Reference Level
Output Reference Level
Output Load
Unit
0.4V to 2.2V
5 ns
1.3V
1.5V
See Figures 1 and 2
AC TEST LOADS
OUTPUT
1 TTL
100 pF
Including
jig and
scope
Figure 1
OUTPUT
1 TTL
5 pF
Including
jig and
scope
Figure 2
IC62LV51216L POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)
Symbol Parameter
ICC Vcc Dynamic Operating
Supply Current
ISB1 TTL Standby Current
(TTL Inputs)
ISB2 CMOS Standby
Current (CMOS Inputs)
OR
Test Conditions
VCC = 3.0V.,
IOUT = 0 mA, f = fMAX
Com.
Ind.
VCC = Max.,
VIN = VIH or VIL, f = 0
CE1 = VIH, CE2 = VIL
Com.
Ind.
Com.
Ind.
VCC = Max.,
Com.
CE1 VCC – 0.2V,
Ind.
or CE2 0.2V
other input = 0-VCC, f = 0
-55
Min. Max.
— 30
— 35
— 0.2
— 0.3
— 0.7*
— 0.8*
— 35
— 50
-70
Min. Max.
— 25
— 30
— 0.2
— 0.3
— 0.7*
— 0.8*
— 35
— 50
-100
Min. Max.
— 20
— 25
— 0.2
— 0.3
— 0.7*
— 0.8*
— 35
— 50
Unit
mA
mA
µA
ULB Control
VCC = Max., CE1 = VIL, CE2 = VIH
VIN 0.2V, f = 0, UB / LB VCC – 0.2V
Note:
1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
*.For TSOP-2
Integrated Circuit Solution Inc.
LPSR014-0C 1/22/2003
5

5 Page





IC62LV51216L arduino
IC62LV51216L
IC62LV51216LL
DATA RETENTION WAVEFORM (CE1 Controlled)
VCC
1.65V
1.4V
VDR
CE1
GND
tSDR Data Retention Mode
CE1 VCC - 0.2V
tRDR
Integrated Circuit Solution Inc.
LPSR014-0C 1/22/2003
11

11 Page







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