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Número de pieza | IC62LV256 | |
Descripción | 32K x 8 Low Power SRAM | |
Fabricantes | ICSI | |
Logotipo | ||
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IC62LV256
Document Title
32K x 8 Low Power SRAM with 3.3V
Revision History
Revision No
0A
History
Initial Draft
Draft Date
October 5,2001
Remark
The attached datasheets are provided by ICSI. Integrated Circuit Solution Inc reserve the right to change the specifications and
products. ICSI will answer to your questions about device. If you have any questions, please contact the ICSI offices.
Integrated Circuit Solution Inc.
ALSR007-0A 10/5/2001
1
1 page IC62LV256
READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)
-45 ns
-70 ns
-100 ns
Symbol
Parameter
Min. Max.
Min. Max.
Min. Max.
Unit
tRC Read Cycle Time
45 —
70 —
100 —
ns
tAA Address Access Time
— 45
— 70
— 100
ns
tOHA
tACE
tDOE
tLZOE(2)
tHZOE(2)
tLZCE(2)
tHZCE(2)
tPU(3)
tPD(3)
Output Hold Time
CE Access Time
OE Access Time
OE to Low-Z Output
OE to High-Z Output
CE to Low-Z Output
CE to High-Z Output
CE to Power-Up
CE to Power-Down
2—
— 45
— 25
0—
0 20
3—
0 20
0—
— 30
2—
— 70
— 35
0—
0 25
3—
0 25
0—
— 50
2—
— 100
— 50
0—
0 25
3—
0 25
0—
— 50
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V
and output loading specified in Figure 1a.
2. Tested with the load in Figure 1b. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
3. Not 100% tested.
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Levels
Output Load
Unit
0V to 3.0V
5 ns
1.5V
See Figures 1a and 1b
AC TEST LOADS
3.3V
1213 Ω
OUTPUT
100 pF
Including
jig and
scope
Figure 1a.
1378 Ω
3.3V
1213 Ω
OUTPUT
5 pF
Including
jig and
scope
Figure 1b.
1378 Ω
Integrated Circuit Solution Inc.
ALSR007-0A 10/5/2001
5
5 Page |
Páginas | Total 9 Páginas | |
PDF Descargar | [ Datasheet IC62LV256.PDF ] |
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