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PDF PE4257 Data sheet ( Hoja de datos )
| Número de pieza | PE4257 | |
| Descripción | SPDT Absorptive UltraCMOS DC | |
| Fabricantes | Peregrine Semiconductor | |
| Logotipo |  |
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Product Description
The PE4257 is a high-isolation UltraCMOS™ Switch designed
for wireless applications, covering a broad frequency range
from near DC up to 3000 MHz. This single-supply SPDT
switch integrates a two-pin CMOS control interface. It also
provides low insertion loss with extremely low bias
requirements while operating on a single 3-volt supply. In a
typical wireless application, the PE4257 provides
unprecedented isolation and integration.
The PE4257 is manufactured in Peregrine’s patented Ultra
Thin Silicon (UTSi®) CMOS process, offering the performance
of GaAs with the economy and integration of conventional
CMOS.
Product Specification
PE4257
50 ΩSPDT Absorptive UltraCMOS™
DC – 3.0 GHz RF Switch
Features
• 50 Ω characteristic impedance
• Integrated 50 Ω 0.25 watt terminations
• High input IP3 > +55 dBm
• High isolation 64 dB at 1000 MHz
• Low insertion loss: typically 0.75 dB
at 1000 MHz and 0.95 dB at 2000 MHz
• LV CMOS two-pin control
• Single +3 volt supply operation
• Low current consumption: 8 µA
Figure 1. Functional Diagram
RFC
Figure 2. Package Type
4x4mm 20 Lead QFN
RF1 RF2
CMOS
Control
Driver
CTRL1 CTRL2
Table 1. Electrical Specifications @ +25 °C, VDD = 3.0 V (ZS = ZL = 50 Ω)
Parameter
Operating Frequency1
Insertion Loss
Isolation Input to Output
Isolation Output to Output
Input IP2
Input IP3
Input 1dB Compression2
Switching Time
Video Feedthrough3
Condition
1000 MHz
2000 MHz
3000 MHz
1000 MHz
2000 MHz
3000 MHz
1000 MHz
2000 MHz
3000 MHz
5 MHz - 1000 MHz
5 MHz - 1000 MHz
1000 MHz
50% CTRL to 10 / 90 RF
5 MHz - 1000 MHz
Minimum
DC
61
46
40
57
54
42
50
29
Notes: 1. Device linearity will begin to degrade below 1 MHz.
2. Note Absolute Maximum ratings in Table 3.
3. Measured with a 1 ns risetime, 0/3 V pulse and 500 MHz bandwidth
Typical
0.75
0.95
1.2
64
50
44
63
60
48
80
55
31
2
Maximum
3000
0.95
1.15
1.4
15
Units
MHz
dB
dB
dB
dBm
dBm
dBm
µs
mVpp
Document No. 70-0166-02 │ www.psemi.com
©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 1 of 7
1 page  
PE4257
Product Specification
Evaluation Kit
The SPDT Switch Evaluation Kit board was designed to
ease customer evaluation of the PE4257 SPDT switch.
The RF common port is connected through a 50 Ω
transmission line to J2. Port 1 and Port 2 are
connected through 50 Ω transmission lines to J1 and
J3. A through transmission line connects SMA
connectors J4 and J5. This transmission line can be
used to estimate the loss of the PCB over the
environmental conditions being evaluated.
The board is constructed of a four metal layer FR4
material with a total thickness of 0.031”. The
transmission lines were designed using a coplanar
waveguide with ground plane (28 mil core, 47.6 mil
width, 30mil gap).
Note the number of vias surrounding the device in the
layout shown in Figure 8. These vias are critical for
obtaining the specified isolation performance for the
device shown in this datasheet.
J6 provides a means for controlling DC and digital
inputs to the device. The provided jumpers short the
package pin to ground for logic low. When the jumper
is removed, the pin is pulled up to VDD for logic high.
When the jumper is in place, 3 µA of current will flow
through the 1 MΩ pull up resistor. This extra current
should not be attributed to the requirements of the
device.
Figure 8. Evaluation Board Layouts
Peregrine Specification 101/0151
Figure 9. Evaluation Board Schematic
Peregrine Specification 102/0198
Document No. 70-0166-02 │ www.psemi.com
©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 5 of 7
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet PE4257.PDF ] | |
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