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Número de pieza | PE4237 | |
Descripción | SPDT UltraCMOS RF Switch DC | |
Fabricantes | Peregrine Semiconductor | |
Logotipo | ||
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Product Description
The PE4237 RF Switch is designed to cover a broad range of
applications from near DC to 4000 MHz. This reflective switch
integrates on-board CMOS control logic driven by a single-pin,
low voltage CMOS or TTL control input. Using a nominal +3-
volt power supply, a 1 dB compression point of +32 dBm can
be achieved. The PE4237 also exhibits outstanding isolation
of better than 43 dB at 1000 MHz and is
offered in a small 3x3 mm DFN package.
The PE4237 is manufactured on Peregrine’s UltraCMOS™
process, a patented variation of silicon-on-insulator (SOI)
technology on a sapphire substrate, offering the performance
of GaAs with the economy and integration of conventional
CMOS.
Figure 1. Functional Diagram
RFC
Product Specification
PE4237
SPDT UltraCMOS™ RF Switch
DC - 4000 MHz
Features
• Single 3.0-volt power supply
• Low insertion loss: 0.35 dB at
1000 MHz, 0.45 dB at 2000 MHz
• High isolation of 43 dB at 1000 MHz,
35 dB at 2000 MHz
• Typical 1 dB compression point of
+32 dBm
• Single-pin CMOS or TTL logic control
• Available in a 6-lead DFN package
Figure 2. Package Type
6-lead DFN
RF1 RF2
CMOS
Control
Driver
CTRL
Table 1. Electrical Specifications @ +25 °C, VDD = 3 V (ZS = ZL = 50 Ω)
Parameter
Conditions
Minimum
Typical
Operation Frequency1
Insertion Loss
Isolation – RFC to RF1/RF2
Isolation – RF1 to RF2
Return Loss
‘ON’ Switching Time
1000 MHz
2000 MHz
1000 MHz
2000 MHz
1000 MHz
2000 MHz
1000 MHz
2000 MHz
50% CTRL to 0.1 dB final value, 2 GHz
DC
41
33
33.5
26.5
19
10.5
0.35
0.45
43
35
35
28
24
14
200
‘OFF’ Switching Time
50% CTRL to 25 dB isolation, 2 GHz
90
Video Feedthrough2
15
Input 1 dB Compression
2000 MHz
30 32
Input IP3
2000 MHz, 17 dBm
50
Notes: 1. Device linearity will begin to degrade below 10 MHz.
2. The DC transient at the output of any port of the switch when the control voltage is switched from Low to
High or High to Low in a 50 Ω test set-up, measured with 1ns risetime pulses and 500 MHz bandwidth.
Maximum
4000
0.50
0.60
Units
MHz
dB
dB
dB
dB
dB
dB
dB
dB
ns
ns
mVpp
dBm
dBm
Document No. 70-0071-03 │ www.psemi.com
©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 1 of 8
1 page PE4237
Product Specification
Evaluation Kit
The SPDT Switch Evaluation Kit board was
designed to ease customer evaluation of the
PE4237 SPDT switch. The RF common port is
connected through a 50 Ω transmission line to the
top left SMA connector, J1. Port 1 and Port 2 are
connected through 50 Ω transmission lines to the top
two SMA connectors on the right side of the board,
J2 and J3. A through transmission line connects
SMA connectors J4 and J5. This transmission line
can be used to estimate the loss of the PCB over the
environmental conditions being evaluated.
The board is constructed of a two metal layer FR4
material with a total thickness of 0.031”. The bottom
layer provides ground for the RF transmission lines.
The transmission lines were designed using a
coplanar waveguide with ground plane model using
a trace width of 0.0476”, trace gaps of 0.030”,
dielectric thickness of 0.028”, metal thickness of
0.0021” and εr of 4.4.
J6 provides a means for controlling DC and digital
inputs to the device. Starting from the lower left pin,
the second pin to the right (J6-3) is connected to the
device CNTL input. The fourth pin to the right (J6-7)
is connected to the device VDD input. A decoupling
capacitor (100 pF) is provided on both CTRL and
VDD traces. It is the responsibility of the customer to
determine proper supply decoupling for their design
application. Removing these components from the
evaluation board has not been shown to degrade RF
performance.
Figure 12. Evaluation Board Layouts
Peregrine Specification 101/0085
Figure 13. Evaluation Board Schematic
Peregrine Specification 102/0110
Document No. 70-0071-03 │ www.psemi.com
©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 5 of 8
5 Page |
Páginas | Total 8 Páginas | |
PDF Descargar | [ Datasheet PE4237.PDF ] |
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