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PDF IDT728985 Data sheet ( Hoja de datos )
| Número de pieza | IDT728985 | |
| Descripción | TIME SLOT INTERCHANGE DIGITAL SWITCH | |
| Fabricantes | IDT | |
| Logotipo |  |
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TIME SLOT INTERCHANGE
DIGITAL SWITCH
256 x 256
IDT728985
.EATURES:
• 256 x 256 channel non-blocking switch
• Automatic signal identification (ST-BUS®, GCI)
• 8 RX inputs — 32 channels at 64 Kbit/s per serial line
• 8 TX outputs — 32 channels at 64 Kbit/s per serial line
• Three-state serial outputs
• Microprocessor Interface (8-bit data bus)
• Frame Integrity for data applications
• 5V Power Supply
• Operating Temperature Range -40°C to +85°C
• Available in 44-pin Plastic Leaded Chip Carrier (PLCC),
44-pin Plastic Quad Flatpack (PQFP) and 40-pin Plastic Dip
(P-DIP)
DESCRIPTION:
The IDT728985 is a ST-BUS®/GCI compatible digital switch controlled by
amicroprocessor. TheIDT728985canhandleasmanyas256,64Kbit/sinput
and output channels. Those 256 channels are divided into 8 serial inputs and
outputs,eachofwhichconsistsof32channels. TheIDT728985providesper-
channel variable or constant throughput delay modes and microprocessor read
and write access to individual channels. As an important function of a digital
switch is to maintain sequence integrity and minimize throughput delay, the
IDT728985 is an ideal solution for most switching needs.
.UNCTIONAL DESCRIPTION
Frame sequence, constant throughput delay, and guaranteed minimum
delay are high priority requirements in today’s integrated data and multimedia
networks. The IDT728985 provides these functions on a per-channel basis
usingastandardmicroprocessorcontrolinterface. Eachoftheeightseriallines
is designed to switch 64 Kbit/s PCM or N x 64 Kbit/s data.
In Processor Mode, the microprocessor can access the input and output time
slots to control other devices such as ISDN transceivers and trunk interfaces.
Supporting both GCI and ST-BUS® formats, IDT728985 has incorporated an
internal circuit to automatically identify the polarity and format of the frame
synchronization.
A functional block diagram of the IDT728985 device is shown on page 1.
The serial streams operate continuously at 2.048 Mb/s and are arranged in
125µswideframeseachcontaining32,8-bitchannels. Eightinput(RX0-7)and
.UNCTIONAL BLOCK DIAGRAM
C4i F0i VCC GND
ODE
RX0 Timing
Unit Output MUX
RX1
RX2
Receive
RX3 Serial Data
Data
RX4 Streams Memory
Transmit
Serial Data
Streams
RX5
Control Register
Connection
RX6 Memory
RX7 Microprocessor Interface
TX0
TX1
TX2
TX3
TX4
TX5
TX6
TX7
DS CS R/W A0/ DTA D0/
A5 D7
CCO
5708 drw01
2001 Integrated Device Technology, Inc.
1
APRIL 2001
DSC-5708/2
1 page  
IDT728985 Time Slot Interchange
Digital Switch 256 x 256
Commercial Temperature Range
Incoming Now
Outgoing Next
Outgoing Now
Time Slot 32 31 30 29 28............ 3 2 1
A BCDE FGH I J
32 31........7 6 5 4 3 2 1
JJJ
32 31.........7 6 5 4 3 2 1 Time Slot
GH I J
32 Slots
32 Slots
For J: DELAY=3 Slots, 32 Slots, 33 Slots, and 34 Slots
For G, H, and I: DELAY= 3 slots
Figure 3. Variable Delay Mode
32 Slots
Incoming
Time Slot 32 31 30 29 28............ 3 2 1
ABCD EFGH I J
Switching
Outgoing
32 31 30 29 28............. 3 2 1 Time Slot
J I HGFE DCBA
32 Slots
32 Slots
For Slot 1 ("A"): IN=32, OUT=1, DELAY=(32-32)+32+(1-1)=32 time slots minimum delay
For Slot 32 ("J"): IN=1, OUT=32, DELAY=(32-1)+32+(32-1)=94 time slots maximum delay
Figure 4. Constant Delay Mode
32 Slots
5708 drw07
5
5 Page 
IDT728985 Time Slot Interchange
Digital Switch 256 x 256
Commercial Temperature Range
AC ELECTRICAL CHARACTERISTICS(1) SERIAL STREAM TIMING
Symbol
tTAZ
tTZA
tOED
tXCD
Characteristics
TX0-7 Delay - Active to High Z
TX0-7 Delay - High Z to Active
Output Driver Enable Delay
CCO Output Delay
Min. Typ.(2) Max.
40 60
40 60
40 60
0 20 40
Unit Test Conditions
ns RL = 1KΩ(3), CL = 150pF
ns CL = 150pF
ns RL = 1KΩ(3), CL = 150pF
ns CL = 150pF
NOTE:
1. Timing is over recommended temperature and power supply voltages.
2. Typical figures are at 25°C and are for design aid only; not guaranteed and not subject to production testing.
3. High Impedance is measured by pulling to the appropriate rail with RL, with timing corrected to cancel time taken to discharge CL.
Bit Cell Boundary
(GCI)
C4i
(ST-BUS)
tTAZ
TX0-7
TX0-7
tTZA
ODE
CCO
tXCD
5708 drw12
Figure 9. Serial Outputs and External Control
TX0-7
11
tOED
tOED
Figure 10. Output Driver Enable
5708 drw13
11 Page | ||
| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet IDT728985.PDF ] | |
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