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PDF S29CD016J Data sheet ( Hoja de datos )

Número de pieza S29CD016J
Descripción (S29CD016J / S29CL016J) Simultaneous Read/Write Flash Memory
Fabricantes SPANSION 
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S29CD016J/S29CL016J
Known Good Die
16 Megabit (512k x 32-Bit) CMOS 2.6 or 3.3 Volt-only
Burst Mode, Dual Boot,
Simultaneous Read/Write Flash Memory
Supplement (Advance Information)
General Description
The Spansion S29CD016J and S29CL016J devices are Floating Gate products fabricated in 110 nm process technology.
These burst mode Flash devices are capable of performing simultaneous read and write operations with zero latency on two
separate banks. These products can operate up to 56 MHz and use a single VCC of 2.5 V to 2.75 V (S29CD-J) or 3.0 V to 3.6 V
(S29CL-J) that make them ideal for today’s demanding automotive applications.
Distinctive Characteristics
„ Single 2.6 V (S29CD-J) or 3.3 V (S29CL-J) for read/program/
erase
„ 110 nm Floating Gate Technology
„ Simultaneous Read/Write operation with zero latency
„ X32 Data Bus
„ Dual Boot Sector Configuration (top and bottom)
„ Flexible Sector Architecture
– CD016J & CL016J: Eight 2K Double word, Thirty-two 16K Double
word, and Eight 2K Double Word sectors
„ VersatileI/O™ control (1.65 V to VCC)
„ Programmable Burst Interface
– Linear for 2, 4, and 8 double word burst with or without wrap around
„ Secured Silicon Sector that can be either factory or customer
locked
„ 20 year data retention (typical)
„ Cycling Endurance: 100,000 write cycles per sector (typical)
„ Command set compatible with JECEC (42.4) standard
„ Supports Common Flash Interface (CFI)
„ Persistent and Password methods of Advanced Sector
Protection
„ Unlock Bypass program command to reduce programming
time
„ Write operation status bits indicate program and erase
operation completion
„ Hardware (WP#) protection of two outermost sectors in the
large bank
„ Ready/Busy (RY/BY#) output indicates data available to
system
„ Suspend and Resume commands for Program and Erase
Operation
Performance Characteristics
Read Access Times
Speed Option (MHz)
Max Asynch. Access Time, ns (tACC)
Max Synch. Latency, ns (tIACC)
Max Synch. Burst Access, ns (tBACC)
Max CE# Access Time, ns (tCE)
Max OE# Access time, ns (tOE)
56
64
64
10
69
22
40
67
67
17
71
22
Current Consumption (Max values)
Continuous Burst Read @ 56 MHz
Program
Erase
Standby Mode
90 mA
50 mA
50 mA
150 µA
Typical Program and Erase Times
Double Word Programming
Sector Erase
18 µs
1.0 s
Publication Number S29CD016J-CL016J_KGD_SP
Revision A Amendment 2
Issue Date September 20, 2006
This document contains information on one or more products under development at Spansion Inc. The information is intended to help you evaluate this product. Do not design in
this product without contacting the factory. Spansion Inc. reserves the right to change or discontinue work on this proposed product without notice.

1 page




S29CD016J pdf
Supplement (Advance Information)
2. Die Pad Locations
30
25 20
15 10
8
31
35
29 28
27
30
31
32
33
34
35
36
37
26 25
24 23
22 21
20 19
18 17
16 15
14 13
12 11
10 9
87
Y
40
45
38
39
40
41
42
43
44
45
46 47
48
49 50
51 52
53 54
55 56
57 58
X
59 60
61 62
63 64
65 66
67 68
6
7
5
4
53
2
1
74
1
73
74
72
71
70
7069
47 50
55
60 65 69
Logo
September 20, 2006 Revision A2
S29CD016J/S29CL016J Known Good Die
5

5 Page





S29CD016J arduino
Supplement (Advance Information)
Figure 6.1 Spansion KGD Product Test Flow
Wafer Sort 1
DC Parameters
Functionality
Programmability
Erasability
Bake
24 hours at 250°C
Data Retention
Electronic Marking
Step 1: Wafer sort,
test 1 & 2 information
Wafer Sort 2
Electronic Marking
Step 2: Final class or
KGD test information
& device speed
Wafer Sort 3
High Temperature
Packaging for
Shipment
DC Parameters
Functionality
Programmability
Erasability
DC Parameters
Functionality
Programmability
Erasability
Speed
Incoming Inspection
Wafer Saw
Die Separation
100% Visual Inspection
Die Pack
Shipment
Electronic marking is programmed into every KGD for the purpose of traceability. The electronic marking
contains wafer lot number, wafer number of origin, die location on the wafer, mask revision, test program
revision, test dates, and speed grade. Figure 6.1 illustrates the steps where specific electronic marking
information is programmed. For more information regarding electronic marking, reference the S29CD016J
Electronic Marking Data Sheet Supplement.
September 20, 2006 Revision A2
S29CD016J/S29CL016J Known Good Die
11

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