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PDF W536030A Data sheet ( Hoja de datos )

Número de pieza W536030A
Descripción (W536xx0A) VOICE/ MELODY / LCD CONTROLLER
Fabricantes Winbond 
Logotipo Winbond Logotipo



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GENERAL DESCRIPTION
The W536XXXA, a member of ViewTalkTM family, is a high-performance 4-bit micro-controller (uC) with
built-in speech unit, melody unit and 64seg * 16 com LCD driver unit which includes internal regulator
,pump circuit and dedicated two pages LCD RAM. The 4-bit uC core contains dual clock source, 4-bit
ALU, two 8-bit timers, one 14 bits divider, maximum 24 pads for input or output, 8 interrupt sources and
8-level nesting for subroutine/interrupt applications. Speech unit, integrated as a single chip with
maximum 128 seconds (based on 6.4K sample rate with 5 bits MDPCM) , is capable of expanding to
512 seconds speech addressed by external memory W55XXX with serial bus interface. It can be
implemented with Winbond Power Speech using MDPCM algorithm. Melody unit provides dual tone
output and can store up to 1k notes. Power reduction mode is also built in to minimize power dissipation.
It is ideal for games, educational toys, remote controllers, watches, clocks and other application
products which incorporate both LCD display and speech.
Body
W536030A W536060A W536090A
W536120A
Voice
30 sec
60 sec
90 sec
120 sec
I/O pad
4I/O,8I
8I/O, 8I
8I/O, 8I , 8O
8I/O, 8I, 8O
(RA/RC/RD)
(RA/RB/RC/RD) (RA/RB/RC/RD/RE/RF) (RA/RB/RC/RD/RE/RF
)
WDT
disable/Enable
Y
Y
Y
Y
(Mask Option)
Sub-clock
RC/XTAL mode
Y
Y
Y
Y
(Mask Option)
RD port shared as
serial bus
Y(1) Y(1)
N
N (2)
(Mask Option)
Tri-state serial bus
(Mask Option) ( 3)
Y
Y
N
N
Cascaded Voice
ROM through Y(1) Y(1)
N
Y
serial bus (2)
(1) Share 3 pads of RD port (RD1/RDP, RD2/SPDATA and RD3/WRP)
(2) Dedicate serial bus 3 pads (RDP, SPDATA and WRP) to interface with W55XXX. Cascaded
Voice ROM can help to expand voice up to 512 sec by W55XXX chip.
(3) Tri-state serial bus mask option can float serial bus while voice playing is no active. Let this
mask option is disabled to get minimum power consumption in general.
FEATURES
Operating voltage: 2.4 volt ~ 5.5 volt
Watch dog disabled/enabled by mask option
Dual clock operating system
Main clock with RC/Crystal (400 KHz to 4 MHz)
Sub-clock with 32.768 KHz RC/Crystal by mask option
Publication Release Date: April 2000
- 1 - Revision A6

1 page




W536030A pdf


  
TEST
I Test pad. Active high with internal pull low resistor.
ROSC
I Connect resistor to VDD pad to generate speech or melody playing clock source.
PWM1/DAC
O While speech or melody is active , PWM1/DAC is speaker direct driving output
or DAC output controlled by voice output file.
PWM2
O While speech or melody is active, PWM2 is another speaker direct driving output.
WRP (5)
O External serial memory address write clock for voice extension (W536120A only).
RDP (5)
O External serial memory address read clock for voice extension. (W536120A only).
SPDATA (5)
I/O External serial memory data in/out for voice extension (W536120A only).
SEG0SEG39 O Dedicated LCD segment output pads.
SEG40/PORTN.0
SEG43/PORTN.3
SEG44/PORTM.0
SEG47/PORTM.3
SEG48/PORTL.0
SEG51/PORTL.3
SEG52/PORTK.0
SEG55/PORTK.3
SEG56/PORTJ.0
SEG59/PORTJ.3
O/O
O/I
O/O
O/I
O/IO
LCD segment output pads, and can be shared as general output by register
LCDM3 bit 1. Default function is segment pad.
LCD segment output pads, and can be shared as general input by register
LCDM3 bit 0. Default function is segment pad and PM5.1=0 to inhibit LCD
waveform abnormal.
LCD segment output pads, and can be shared as general output by register
LCDM2 bit 0. Default function is segment pad.
LCD segment output pads, and can be shared as general input by register
LCDM2 bit 1. Default function is segment pad and PM5.0=0 to inhibit LCD
waveform abnormal.
LCD segment output pads, and can be shared as general input/output by register
LCDM2 bit 2. PM4 register is used to select input or output while shared I/O
function is active. Default function is segment pad and PM4.3=0 to inhibit LCD
waveform abnormal.
SEG60/PORTI.0
SEG63/PORTI.3
O/IO
LCD segment output pads, and can be shared as general input/output by register
LCDM2 bit 3. PM4 register is used to select input or output while shared I/O
function is active. Default function is segment pad and PM4.2=0 to inhibit LCD
waveform abnormal.
Publication Release Date:April 2000
- 5 - Revision A6

5 Page





W536030A arduino


  
APPLICATION CIRCUIT--1: Sub clock with RC mode
VLCD> (VDD-0.5v)
Panel
RA0~3
RB0~3
RC0~3
RD0~3
RE0~3
RF0~3
VDD
( 2) * R5
RES
C9
Battery
VDDP
C11
C10
R4
VDD
R1 ROSC
R3 XIN
X32IN
R2
X32O
W536xxxA
VDDP
470
(*3)
PWMP/DAC
PWMN
DH1
DH2
V6
V5
C1
+-
C6
(*1)
C5
V4 C4
V3 C3
C2
V2
Component C1~C6 C7,C8 C9,C10 C11 R1 R2 R3
R4
Value
0.1uF -
0.1uF 1uF 680K 680K 680Kohm/1Mhz 100
330Kohm/2Mhz
200Kohm/3Mhz
130Kohm/4Mhz
Note:
(1) C1~C6 depends on LCD panel dot size.
(2) Option R5 equals to 100if high noise immunity is needed.
(3) For DAC option application.
(4) To sure chip operation properly, please bond all VDDP, VDD, VSSP and VSS .
- 11 -
Publication Release Date:April 2000
Revision A6

11 Page







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