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PDF QT60248 Data sheet ( Hoja de datos )
| Número de pieza | QT60248 | |
| Descripción | (QT60168 / QT60248) 16 AND 24 KEY QMATRIX TOUCH SENSOR ICs | |
| Fabricantes | QUANTUM | |
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lQ
QProx™ QT60168, QT60248
16, 24 KEY QMATRIX™ ICs
z Second generation charge-transfer QMatrix technology
z Keys individually adjustable for sensitivity, response
time, and many other critical parameters
z Panel thicknesses to 50mm through any dielectric
z 16 and 24 touch key versions
z 100% autocal for life - no adjustments required
z SPI slave interface
z Adjacent key suppression feature
z Synchronous noise suppression feature
z Spread-spectrum modulation - high noise immunity
z Mix and match key sizes & shapes in one panel
z Low overhead communications protocol
z FMEA compliant design features
z Negligible external component count
z Extremely low cost per key
z +3 to +5V single supply operation
z 32-pin lead-free TQFP package
X3
X4
VSS
VDD
VSS
VDD
X5
X6
132 31 30 29 28 27 26 2524
2 23
3 QT60248 22
4 QT60168 21
5 20
6 TQFP-32 19
7 18
8 17
9 10 11 12 13 14 15 16
Y1B
Y0B
n/c
VSS
VDD
SYNC
VDD
SCK
APPLICATIONS
y Security keypanels
y Industrial keyboards
y Appliance controls
y Outdoor keypads
y ATM machines
y Touch-screens
y Automotive panels
y Machine tools
These digital charge-transfer (“QT”) QMatrix™ ICs are designed to detect human touch on up to 16 or 24 keys when used with a
scanned, passive X-Y matrix. They will project touch keys through almost any dielectric, e.g. glass, plastic, stone, ceramic, and even
wood, up to thicknesses of 5 cm or more. The touch areas are defined as simple 2-part interdigitated electrodes of conductive material,
like copper or screened silver or carbon deposited on the rear of a control panel. Key sizes, shapes and placement are almost entirely
arbitrary; sizes and shapes of keys can be mixed within a single panel of keys and can vary by a factor of 20:1 in surface area. The
sensitivity of each key can be set individually via simple functions over the serial port by a host microcontroller. Key setups are stored
in an onboard eeprom and do not need to be reloaded with each powerup.
These devices are designed specifically for appliances, electronic kiosks, security panels, portable instruments, machine tools, or
similar products that are subject to environmental influences or even vandalism. They permit the construction of 100% sealed,
watertight control panels that are immune to humidity, temperature, dirt accumulation, or the physical deterioration of the panel surface
from abrasion, chemicals, or abuse. To this end they contain Quantum-pioneered adaptive auto self-calibration, drift compensation, and
digital filtering algorithms that make the sensing function robust and survivable.
These devices feature continuous FMEA self-test and reporting diagnostics, to allow their use in critical consumer appliance
applications, for example ovens and cooktops.
Common PCB materials or flex circuits can be used as the circuit substrate; the overlying panel can be made of any non-conducting
material. External circuitry consists of only a few passive parts. Control and data transfer is via an SPI port.
These devices makes use of an important new variant of charge-transfer sensing, transverse charge-transfer, in a matrix format that
minimizes the number of required scan lines. Unlike older methods, it does not require one IC per key.
TA
-400C to +1050C
-400C to +1050C
AVAILABLE OPTIONS
# Keys
Part Number
16 QT60168-ASG
24 QT60248-ASG
Lead-Free
Yes
Yes
LQ
Copyright © 2004 QRG Ltd
QT60248-AS R4.02/0405
1 page  
Figure 2-4 X-Drive Pulse Roll-off and Dwell Time
X drive
Dwell time
Y gate
Lost charge due to
inadequate settling
before end of dwell time
Figure 2-6 Recommended Key Structure
‘T’ should ideally be similar to the complete thickness the fields need to
penetrate to the touch surface. Smaller dimensions will also work but will give
less signal strength. If in doubt, make the pattern coarser.
Figure 2-5 Probing X-Drive Waveforms With a Coin
Increasing the burst length (BL) parameter will increase the
signal strengths as will increasing the sampling resistor (Rs)
values.
2.8 Matrix Series Resistors
The X and Y matrix scan lines should use series resistors
(referred to as Rx and Ry respectively) for improved EMI
performance.
X drive lines require them in most cases to reduce edge rates
and thus reduce RF emissions. Typical values range from 1K to
20K ohms.
Y lines need them to reduce EMC susceptibility problems and in
some extreme cases, ESD. Typical Y values range around 1K
ohms. Y resistors act to reduce noise susceptibility problems by
forming a natural low-pass filter with the Cs capacitors.
It is essential that the Rx and Ry resistors and Cs capacitors be
placed very close to the chip. Placing these parts more than a
few millimeters away opens the circuit up for high frequency
interference problems (above 20MHz) as the trace lengths
between the components and the chip start to act as RF
antennae.
The upper limits of Rx and Ry are reached when the signal
level and hence key sensitivity are clearly reduced. The limits of
Rx and Ry will depending on key geometry and stray
capacitance, and thus an oscilloscope is required to determine
optimum values of both.
The upper limit of Rx can vary depending on key geometry and
stray capacitance, and some experimentation and an
oscilloscope are required to determine optimum values.
Dwell time is the duration in which charge coupled from X to Y
is captured. Increasing Rx values will cause the leading edge of
the X pulses to increasingly roll off, causing the loss of captured
charge (and hence loss of signal strength) from the keys
(Figure 2-4). The dwell time of these parts is fixed at 375ns. If
the X pulses have not settled within 375ns, key gain will be
reduced; if this happens, either the stray capacitance on the X
line(s) should be reduced (by a layout change, for example by
reducing X line exposure to nearby ground planes or traces), or,
the Rx resistor needs to be reduced in value (or a combination
of both approaches).
One way to determine X line settling time is to monitor the fields
using a patch of metal foil or a small coin over the key (Figure
2-5). Only one key along a particular X line needs to be
observed, as each of the keys along that X line will be identical.
The 250ns dwell time should be exceed the observed 95%
settling of the X-pulse by 25% or more.
In almost all case, Ry should be set equal to Rx, which will
ensure that the charge on the Y line is fully captured into the Cs
capacitor.
2.9 Key Design
Circuits can be constructed out of a variety of materials
including flex circuits, FR4, and even inexpensive single-sided
CEM-1.
The actual internal pattern style is not as important as is the
need to achieve regular X and Y widths and spacings of
sufficient size to cover the desired graphical key area or a little
bit more; ~3mm oversize is acceptable in most cases, since the
key’s electric fields drop off near the edges anyway. The overall
key size can range from 10mm x 10mm up to 100mm x 100mm
but these are not hard limits. The keys can be any shape
including round, rectangular, square, etc. The internal pattern
lQ
5 QT60248-AS R4.02/0405
5 Page 
(DI) pin of the host. MISO floats when /SS is high to allow
multi-drop communications along with other slave parts.
SCK - SPI clock - input only clock from host. The host must
shift out data on the falling SCK edge; the QT60xx8 clocks
data in on the rising edge. The QT60xx8 likewise shifts data
out on the falling edge of SCK back to the host so that the
host can shift the data in on the rising edge. Important:
SCK must idle high; it should never float.
/SS - Slave select - input only; acts as a framing signal to the
sensor from the host. /SS must be low before and during
reception of data from the host. It must not go high again
until the SCK line has returned high; /SS must idle high.
This pin includes an internal pull-up resistor of 20K ~ 50K.
When /SS is high, MISO floats.
DRDY - Data Ready - active-high - indicates to the host that
the QT is ready to send or receive data. This pin idles high.
This pin includes an internal pull-up resistor of 20K ~ 50K.
In SPI mode this pin is an output only (i.e. open drain with
internal pull-up).
The MISO pin on the QT floats in 3-state mode between bytes
when /SS is high. This facilitates multiple devices on one SPI
bus.
Null Bytes: When the QT responds to a command with one or
more response bytes, the host should issue a null commands
(0x00) to get the response bytes back. The host should not
send new commands until all the responses are accepted back
from the QT from the prior command via nulls.
New commands attempted during intermediate byte transfers
are ignored.
SPI Line Noise: In some designs it is necessary to run SPI
lines over ribbon cable across a lengthy distance on a PCB.
This can introduce ringing, ground bounce, and other noise
problems which can introduce false SPI clocking or false data.
Simple RC networks and slower data rates as shown in Figure
3-2 are helpful to resolve these issues.
CRC checks have been added to critical commands in order to
detect transmission errors to a high level of certainty.
3.3 Command Error Handling
If an unrecognized command is received, the device will release
DRDY high and the communications error flag will be set in the
General Status byte (see Section 4.5).
4 Control Commands
Refer to Table 4.2, page 16 for further details.
The devices feature a set of commands which are used for
control and status reporting. The host device has to send the
command to the QT60xx8 and await a response.
SPI mode: While waiting the host should delay for 40µs from
the end of the command, then start to check if DRDY is or goes
high. If it is high, then the host master can clock out the
resulting byte(s).
Command timeouts: Where a command involves multi-byte
transfers in either direction, each byte must be transmitted
within 100ms of the prior byte or the command will timeout. No
error is reported for this condition; the command simply ceases.
Word return byte order: Where a word or long word is
returned (16 or 24 bit number or bit pattern) the low order byte
is sent or received first.
4.1 Null Command - 0x00
Used to shift back data from the QT. Since the host device is
always the master in SPI mode, and data is clocked in both
directions, the Null command is required frequently to act as a
placeholder where the desire is to only get data back from the
QT, not to send a command.
In SPI communications, when the QT60xx8 responds to a
command with one or more response bytes, the host can issue
a new command instead of a null on the last byte shift
operation.
New commands during intermediate byte shift-out operations
are ignored, and null bytes should always be used.
Figure 3-3 SPI Slave-Only Mode Timing
S1: m333ns S2: [20ns
S3: m25ns
S4: [20ns
S5: [40µs
S6: m1µs
S7: m333ns
S8: m333ns S9: m667ns
DRDY
(from QT)
high via pullup-R
S1
S5
/SS
(from Host)
S3
CLK
(from Host)
MOSI
(Data from Host)
?
MISO
(Data from QT)
3-state
Data shifts in to QT on rising edge
76543210
S2 {Command byte}
Data shifts out of QT on falling edge
?7 6 5 4 3 2 1 0
S4
3-state
S6
S9
S7 S8
76543210
{optional 2nd command byte}
?7 6 5 4 3 2 1 0
76543210
{null byte or next command to get QT response}
?7 6 5 4 3 2 1 0
data response
lQ
11 QT60248-AS R4.02/0405
11 Page | ||
| Páginas | Total 28 Páginas | |
| PDF Descargar | [ Datasheet QT60248.PDF ] | |
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