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PDF QT1100A-ISG Datasheet ( Hoja de datos )

Número de pieza QT1100A-ISG
Descripción 10 KEY QTOUCH SENSOR IC
Fabricantes QUANTUM 
Logotipo QUANTUM Logotipo

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QT1100A-ISG Hoja de datos, Descripción, Manual
www.DataSheet4U.com
lQ
ADVANCED INFORMATION
QT1100A-ISG
10 KEY QTOUCH™ SENSOR IC
z 10 independent touch sensing fields
z 100% autocal for life - no adjustments required
z SPI and UART serial interfaces
z Scanport output - simulates a membrane keypad
z Simple external per channel passive circuit
z User-defined setups of operating parameters
z 3.3V~5.0V single supply operation
z AKS™ Adjacent Key Suppression for tight key layouts
z Sleep mode for low power operation
z Spread spectrum modulated bursts - superior noise rejection
z Sync pin for superior mains frequency noise rejection
z FMEA compliant design features - self detects faults
z Lower per key cost than many mechanical switches
z Lead-free package
APPLICATIONS
Š PC peripherals
Š Television controls
Š Instrument panels
Š Appliance controls
Š Pointing devices
Š Gaming machines
Actual Size
QT1100A charge-transfer (“QT”) QTouch ICs are self-contained digital controllers capable of detecting near-proximity or touch on up to
10 electrodes. This device allows each electrode to project an independent sense field through glass or plastic. These devices require
only a few inexpensive passive components per sensing channel. The devices are designed specifically for human interfaces, such as
control panels, appliances, gaming devices, lighting controls, or anywhere a mechanical switch may be found.
Each key channel operates independently, and can be tuned to a unique sensitivity level by simply changing setup values in an
EEPROM or via a serial interface. An external EEPROM can store the setups permanently for standalone applications, for example
when using the scanport, or, the EEPROM can be omitted if the serial port is used to send setup information after each power-up.
Included is patent pending AKS™ Adjacent Key Suppression which suppresses touch from weakly responding keys and allows only a
dominant key to detect, to solve the problem of large fingers on tightly spaced keys. Modulated burst technology provides superior
noise rejection. ‘Fast-DI’ operation works to further suppress false activations due to noise.
These devices also have a Sync pin to suppress some forms of external interference. A Sleep mode is also available for very low
power standby operation.
The QT1100A is designed specifically to assist in creating FMEA compliant designs, allowing it to be used in applications such as
appliance controls.
Using the charge transfer principle, these devices deliver a level of performance which is clearly superior to older technologies yet
extremely cost-effective.
TA
-40ºC to +85ºC
LQ
AVAILABLE OPTIONS
SSOP-48
QT1100A-ISG
1
LEAD-FREE
Yes
Copyright © 2003-2005 QRG Ltd
QT1100A-ISG R3.02/1105

1 page

QT1100A-ISG pdf
Table 1.2 Standalone Pinlist
Scanport, with EEPROM; no serial interface
Pin
Name
Type
Function
1 SNS3 I/O Sense pin
2 SNS3K I/O Sense pin
3 SNS4 I/O Sense pin
4 SNS4K I/O Sense pin
5 SNS5 I/O Sense pin
6 SNS5K I/O Sense pin
7 SNS6
8 SNS6K
9 SNS7
10 SNS7K
I/O Sense pin
I/O Sense pin
I/O Sense pin
I/O Sense pin
11 n/c
- Unused
12 n/c
- Unused
13 SNS8
I/O Sense pin
14 SNS8K
I/O Sense pin
15 SNS9
I/O Sense pin
16 SNS9K
I/O Sense pin
17 Vss Pwr Ground
18 CKEE
O EEPROM
19 DOEE
O EEPROM
20 DIEE
I EEPROM
21 TX
OD UART
22 RX/WAKE
I UART, Wakeup
23
CRDY
I/O, OD Handshake
24 CSEE
O EEPROM
25 SCANO_0 O Scanport out
26 SCANO_1 O Scanport out
27 SCANO_2 O Scanport out
28 SCANO_3 O Scanport out
29 SCANI_2 I Scanport in
30 SCANI_1 I Scanport in
31 SCANI_0 I Scanport in
32 CMODE
I Comms select
33 SYNC I/O Sync in
34 LED/STAT
O LED & Status
35 RST
I Reset input
36 Vdd Pwr Power
37 OSC1
I Resonator
38 OSC2
O Resonator
39 n/c
- Unused
40 n/c
- Unused
41 n/c
- Unused
42 n/c
- Unused
43 SNS0
I/O Sense pin
44 SNS0K
I/O Sense pin
45 SNS1
I/O Sense pin
46 SNS1K
I/O Sense pin
47 SNS2
I/O Sense pin
48 SNS2K
I/O Sense pin
I CMOS input
I/O CMOS I/O
O CMOS output (push-pull)
OD CMOS open drain I/O
Pwr Power / ground
Notes
To CS3
To CS3 + Key
To CS4
To CS4 + Key
To CS5
To CS5 + Key
To CS6
To CS6 + Key
To CS7
To CS7 + Key
-
-
To CS8
To CS8 + Key
To CS9
To CS9 + Key
0V
Clock to EEPROM
Data out to EEPROM
Data in from EEPROM
To Vss
To Vdd
Leave open
EEPROM chip select
See Table 2.1
See Table 2.1
See Table 2.1
See Table 2.1
See Table 2.1
See Table 2.1
See Table 2.1
To Vss
Always use pull-up R
-
Active low
+3.3 ~ +5V
12MHz - Can also be ext clock in
-
-
-
-
-
To CS0 + Key
To CS0
To CS1 + Key
To CS1
To CS2 + Key
To CS2
If Unused
Open
Vss or open
Open
Vss or open
Open
Vss or open
Open
Vss or open
Open
Vss or open
-
-
Open
Vss or open
Open
Vss or open
-
-
-
-
-
-
-
-
Open
Open
Open
Open
Vss
Vss
Vss
-
20K ~ 220K to Vdd
Open
Vdd
-
-
Open
-
-
-
-
Open
Vss or open
Open
Vss or open
Open
Vss or open
LQ
5 Copyright © 2003-2005 QRG Ltd
QT1100A-ISG R3.02/1105

5 Page

QT1100A-ISG arduino
Figure 1.3 Scanport Only Connection Diagram+
Without EEPROM
VUNREG
*10uF
KEY3
KEY4
KEY5
KEY6
KEY7
4.7K
4.7K
4.7K
4.7K
4.7K
Regulator
VI G VO
*4.7uF
VDD
*100nF
*One bypass capacitor to be tightly coupled to pins 36 and 17.
Follow regulator manufacturer's recommendations
for input and output capacitors.
22nF
2.2K
22nF
2.2K
22nF
2.2K
22nF
2.2K
22nF
2.2K
QT1100A-AS
2.2K
2.2K
2.2K
4.7K
22nF 4.7K
22nF 4.7K
22nF
KEY2
KEY1
KEY0
12MHz 3-PIN
RESONATOR
VDD
KEY8
KEY9
4.7K
4.7K
22nF
2.2K
22nF
2.2K
4.7K
22K
RESET
SYNC
22K
SCANI_0
SCANI_1
SCANI_2
SCANO_3
SCANO_2
SCANO_1
SCANO_0
LQ
11 Copyright © 2003-2005 QRG Ltd
QT1100A-ISG R3.02/1105

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