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PDF FAN5632 Data sheet ( Hoja de datos )

Número de pieza FAN5632
Descripción (FAN5631 / FAN5632) Regulated Step-Down Charge Pump DC/DC Converter
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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No Preview Available ! FAN5632 Hoja de datos, Descripción, Manual

October 2007
FAN5631 / FAN5632
Regulated Step-Down Charge Pump DC/DC Converter
Features
ƒ 90% Peak Efficiency
ƒ Low EMI
ƒ Low Ripple
ƒ Selectable Output Voltage:1.2V/1.5V for FAN5631
ƒ Efficiency Optimizer Feature for FAN5632
ƒ Input Voltage Range: 2.2V to 5.5V
ƒ Output Current: Up to 250mA
ƒ ±5% Output Voltage Accuracy
ƒ 30µA Operating Current
ƒ ICC<1mA in Shutdown Mode
ƒ 1.5MHz Operating Frequency
ƒ Shutdown Isolates Output from Input
ƒ Soft-Start Limits Inrush Current
ƒ Short-Circuit and Over-Temperature Protection
ƒ Minimum External Component Count
ƒ 10-Lead 3x3mm MLP Package
Applications
ƒ Cell Phones
ƒ Handheld Computers
ƒ Portable Electronic Equipment
ƒ Core Supply to Next-Generation Processors
ƒ Low-Voltage DC Bus
ƒ Digital Cameras
ƒ DSP Supplies
Description
The FAN5631/FAN5632 is an advanced, third-
generation switched capacitor step-down DC/DC
converter utilizing Fairchild's proprietary ScalarPump
technology. This innovative architecture utilizes scalar
switch re-configuration and fractional switching
techniques to produce low output ripple, lower ESR
spikes, and improve efficiency over a wide load range.
The FAN5631/FAN5632 produces a fixed regulated
output voltage from an input voltage of 2.2V to 5V.
To maximize efficiency, the FAN5631/5632 achieves
regulation by skipping pulses. Depending on load
current, the size of the switches are scaled dynamically;
consequently, current spikes and EMI are minimized.
An internal soft-start circuitry prevents excessive current
from the supply. The device is internally protected
against short-circuit and over-temperature conditions.
The FAN5631 has a dual-output voltage feature. When
VSEL is high, VOUT is 1.5V; and when VSEL is low, VOUT is
1.2V.
The FAN5632 has an efficiency optimizer feature that,
when enabled, changes the switch mode configuration
from 2:1 to 1:1 at the lower threshold of VIN. The
efficiency is maintained at its peak level over a wider
range of input voltages. In addition, VOUT varies from
1.2V to 1.5V as a result of this efficiency optimization. If
the efficiency optimizer is not enabled, VOUT is regulated
to 1.5V.
Both the FAN5631 and FAN5632 are available in a 10-
lead 3x3mm MLP package.
Ordering Information
Part Number
Package
FAN5631MPX
10-Lead 3x3mm Molded Leadless Package (MLP)
FAN5632MPX
10-Lead 3x3mm Molded Leadless Package (MLP)
All packages are lead free per JEDEC: J-STD-020B standard.
© 2006 Fairchild Semiconductor Corporation
FAN5631/FAN5632 Rev. 1.0.2
Packing Method
Tape and Reel
Tape and Reel
www.fairchildsemi.com

1 page




FAN5632 pdf
Electrical Characteristic
VIN = 2.2V to 5.5V, IOUT = 1mA, CIN = 10µF, COUT = 10µF, CB = 1µF, TA = -40°C to +85°C, unless otherwise noted.
Typical values are at TA = 25°C.
Symbol
Parameter
Conditions
Min. Typ.
VUVLO
Input Under-voltage Lockout
No-load Supply Current
No Switching
2
FAN5631, SEL to High
1.5
FAN5631, SEL to Low
1.2
VOUT Output Voltage
FAN5632, SEL to High
FAN5632, SEL to Low
1.5
Variable
between
1.5 and 1.2
Output Voltage Accuracy
1mA IOUT 150mA, VIN=2.7V to
5.5V
-5
RLOAD
RLINE
ISD
ISC
Load Regulation
Line Regulation
Shutdown Supply Current
Output Short-circuit Current (3)
Peak Efficiency
0mA IOUT 150mA, VIN=3.6V
IOUT=0.1mA
VEN=0V
VOUT 150mA
0.25
0.2
0.1
25
90
FOSC
TSD
VIN at Configuration Change
Oscillator Frequency
Thermal Shutdown Threshold
VIN Decreasing
2.22xVOUT
1.5
150
TSDHYS
Thermal Shutdown Threshold
Hysteresis
15
VIH
Enable Logic Input High
Voltage
1.3
VIL
Enable Logic Input Low
Voltage
IEN Enable Logic Input Current
VIH VSEL Logic Input High Voltage
-1
1.3
Max.
60
+5
4.0
1.0
0.4
1
Units
V
µA
V
%
mV/mA
mV/V
µA
mA
%
V
MHz
°C
°C
V
V
µA
V
VIL VSEL Logic Input Low Voltage
0.4 V
IIN VSEL Logic Input Current
-1 1 µA
tON VOUT Turn-On Time
1.6 ms
Note:
3. The short-circuit protection is designed to protect against pre-existing short-circuit conditions, such as assembly
shorts, that exist prior to device power-up. The short-circuit current limit is 25mAAverage. Short-circuit currents in
normal operation are inherently limited by the on resistance of the internal FET. Since this resistance is in the
range of 1Ω, in some cases, thermal shutdown may occur. Immediately following the first thermal shutdown
event, the short-circuit condition is treated as pre-existing and the load current reduces to 25mAAverage.
© 2006 Fairchild Semiconductor Corporation
FAN5631/FAN5632 Rev. 1.0.2
5
www.fairchildsemi.com

5 Page





FAN5632 arduino
Physical Dimensions
0.15 C
2X
3.0
A
B
10
2.25
2.20
2.00
6
3.0
0.8 MAX
0.10 C
TOP VIEW
0.08 C 0.05
0.00
SEATING
PLANE
PIN #1 IDENT
SIDE VIEW
(3.00±0.10)
2.25±0.05
(0.38)
15
0.15 C
2X
(0.20)
C
0.23
D
0.02
1
0.50
5
0.25
RECOMMENDED LAND PATTERN
1.55±0.05
(3.00±0.10)
0.40±0.05
10
0.5
0.30 6
0.20
2.0
BOTTOM VIEW
0.10 C A B
0.05 C
A. CONFORMS TO JEDEC REGISTRATION MO-229,
VARIATION WEED-5
B. DIMENSIONSARE IN MILLIMETERS.
C. DIMENSIONSAND TOLERANCESPER
ASME Y14.5M, 1994
D. LAND PATTERN DIMENSIONSARE NOMINAL
REFERENCEVALUES ONLY
MLP10BrevA
Figure 17. 10-lead, Molded Leadless Package (MLP)
© 2006 Fairchild Semiconductor Corporation
FAN5631/FAN5632 Rev. 1.0.2
11
www.fairchildsemi.com

11 Page







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