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PDF FAN7383 Data sheet ( Hoja de datos )

Número de pieza FAN7383
Descripción Half Bridge Gate Driver
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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FAN7383
Half-Bridge Gate-Drive IC
September 2006
Features
„ Floating Channel Designed for Bootstrap Operation to
+600V.
„ Typically 350mA/650mA Sourcing/Sinking Current
Driving Capability for Both Channels
„ Extended Allowable Negative VS Swing to -9.8V for
Signal Propagation at VDD=VBS=15V
„ High-Side Output in Phase of IN Input Signal
„ Built-in UVLO Functions for Both Channels
„ Built-in Common-Mode dv/dt Noise Canceling Circuit
„ Typically Internal 330nsec Minimum Dead Time
„ Programmable Turn-On Delay Time Control
(Dead Time)
Applications
„ SMPS
„ Motor Drive Inverter
„ Fluorescent Lamp Ballast
„ HID Ballast
Description
The FAN7383 is a half-bridge gate-drive IC with
shutdown and programmable dead-time control
functions for driving MOSFETs and IGBTs that operate
up to +600V.
Fairchild’s high voltage process and common-mode
noise canceling technique give stable operation of high-
side drivers under high-dv/dt noise circumstances.
An advanced level-shift circuit allows high-side gate
driver operation up to VS= -9.8V (typical) for VBS=15V.
The UVLO circuits for both channels prevent malfunction
when VDD and VBS are lower than the specified
threshold voltage.
Output drivers typically source/sink 350mA/650mA,
respectively, which is suitable for all kinds of half and full
bridge inverter.
14-SOP
1
Ordering Information
Part Number
FAN7383M
FAN7383MX
Package
14-SOP
Pb-Free
Yes
Operating Temperature Range Packing Method
-40°C ~ 125°C
Tube
Tape & Reel
© 2006 Fairchild Semiconductor Corporation
FAN7383 Rev. 1.0.0
www.fairchildsemi.com

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FAN7383 pdf
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Absolute Maximum Ratings
The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The
device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables
are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table defines the
conditions for actual device operation. TA = 25°C unless otherwise specified.
Symbol
Parameter
Min.
Max.
Unit
VS
VB
VHO
VDD
VLO
VIN
VSD
VDT
GND
dVS/dt
PD(1)(2)(3)
θJA
TJ
TSTG
High-side offset voltage
High-side floating supply voltage
High-side floating output voltage HO1, HO2
Low-side and logic fixed supply voltage
Low-side output voltage LO1, LO2
Logic input voltage (IN)
Shutdown logic input voltage
Dead-time control voltage
Logic ground
Allowable offset voltage slew rate
Power dissipation
Thermal resistance, junction-to-ambient
Junction temperature
Storage temperature
VB-25
-0.3
VS-0.3
-0.3
-0.3
-0.3
-0.3
-0.3
VDD-25
VB+0.3
625
VB+0.3
25
VDD+0.3
VDD+0.3
VDD+0.3
5.0
VDD+0.3
50
1.0
110
150
150
V
V
V
V
V
V
V
V
V
V/nsec
W
°C/W
°C
°C
Notes:
1. When mounted on 76.2 x 114.3 x 1.6mm PCB. (FR-4 glass epoxy material).
2. Please refer to:
JESD51-2: Integral circuits thermal test method environmental conditions - Natural convection
JESD51-3: Low effective thermal conductivity test board for leaded surface mount packages
3. Do not exceed PD under any circumstances.
Recommended Operating Conditions
Symbol
Parameter
VB High-side floating supply voltage
VS High-side floating supply offset voltage
VDD Low-side supply voltage
VHO High-side (HO) output voltage
VLO Low-side (LO) output voltage
VIN Logic input voltage (IN)
TA Ambient temperature
Condition
Min.
VS+15
6-VDD
15
VS
GND
GND
-40
Max.
VS+20
600
20
VB
VDD
VDD
125
Unit
V
V
V
V
V
V
°C
© 2006 Fairchild Semiconductor Corporation
FAN7383 Rev. 1.0.0
5
www.fairchildsemi.com

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Typical Characteristics (Continued)
-6
-8
-10
-12
-14
-40 -20
0 20 40 60 80 100 120
Temperature [°C]
Figure 23. Allowable Negative VS Voltage for Signal
Propagation to High Side vs. Temperature
© 2006 Fairchild Semiconductor Corporation
FAN7383 Rev. 1.0.0
11
www.fairchildsemi.com

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