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PDF IRLR3103 Data sheet ( Hoja de datos )
| Número de pieza | IRLR3103 | |
| Descripción | Power MOSFET ( Transistor ) | |
| Fabricantes | International Rectifier | |
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PD - 9.1333B
PRELIMINARY
IRLR/U3103
HEXFET® Power MOSFET
l Logic-Level Gate Drive
l Ultra Low On-Resistance
l Surface Mount (IRLR3103)
l Straight Lead (IRLU3103)
l Advanced Process Technology
l Fast Switching
l Fully Avalanche Rated
Description
D
VDSS = 30V
G RDS(on) = 0.019Ω
S ID = 46A
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve the
lowest possible on-resistance per silicon area. This benefit,
combined with the fast switching speed and ruggedized
device design that HEXFET Power MOSFETs are well
known for, provides the designer with an extremely efficient
device for use in a wide variety of applications.
The D-PAK is designed for surface mounting using vapor
phase, infrared, or wave soldering techniques. The straight
lead version (IRFU series) is for through-hole mounting
applications. Power dissipation levels up to 1.5 watts are
possible in typical surface mount applications.
Absolute Maximum Ratings
D -PA K
TO -252A A
I-PAK
TO -2 5 1 AA
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
T STG
Parameter
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Max.
46
29
220
69
0.56
±16
240
34
6.9
2.0
-55 to + 150
300 (1.6mm from case)
Units
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
Thermal Resistance
Parameter
Min.
Typ.
RθJC
RθJA
Junction-to-Case
Junction-to-Ambient (PCB mount)**
––––
––––
––––
––––
RθJA
Junction-to-Ambient
––––
––––
** When mounted on 1" square PCB (FR-4 or G-10 Material ) .
For recommended footprint and soldering techniques refer to application note #AN-994
Max.
1.8
50
110
Units
°C/W
8/7/96
1 page  
50
L IM IT E D B Y P A C K A G E
40
30
20
10
0A
25 50 75 100 125 150
TC , Case Temperature (°C )
Fig 9. Maximum Drain Current Vs.
Case Temperature
10
IRLR/U3103
VDS
VGS
RG
RD
D.U.T.
4.5V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
+-VDD
Fig 10a. Switching Time Test Circuit
VDS
90%
10%
VGS
td(on) tr
td(off) tf
Fig 10b. Switching Time Waveforms
1 D = 0.50
0 .2 0
0 .1 0
0 .0 5
0.1
0 .0 2
0 .0 1
S IN G L E P U L S E
(T HE RM A L R E S P O NS E )
0.01
0.00001
0.0001
PD M
N o te s:
1. Duty factor D = t1 / t 2
t1
t2
2. Pe a k TJ = P DM x Z t h JC + T C
0.001
0.01
0.1
t 1 , Rectan gular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
A
1
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet IRLR3103.PDF ] | |
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